From 0be419947eca04967a9f36d1f843026534cc3569 Mon Sep 17 00:00:00 2001
From: Kyösti Mälkki <kyosti.malkki@gmail.com>
Date: Fri, 8 Jan 2021 13:58:10 +0200
Subject: arch/x86: Use wildcard for mb/smihandler.c
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Change-Id: I306f8cd74af62c0cd30f445d20c47f774f122481
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49247
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
 src/mainboard/google/link/smihandler.c | 97 ++++++++++++++++++++++++++++++++++
 1 file changed, 97 insertions(+)
 create mode 100644 src/mainboard/google/link/smihandler.c

(limited to 'src/mainboard/google/link/smihandler.c')

diff --git a/src/mainboard/google/link/smihandler.c b/src/mainboard/google/link/smihandler.c
new file mode 100644
index 0000000000..8d4b4bd5af
--- /dev/null
+++ b/src/mainboard/google/link/smihandler.c
@@ -0,0 +1,97 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <acpi/acpi.h>
+#include <acpi/acpi_gnvs.h>
+#include <console/console.h>
+#include <cpu/x86/smm.h>
+#include <soc/nvs.h>
+#include <southbridge/intel/bd82x6x/pch.h>
+#include <southbridge/intel/bd82x6x/me.h>
+#include <southbridge/intel/common/pmbase.h>
+#include <northbridge/intel/sandybridge/sandybridge.h>
+#include <cpu/intel/model_206ax/model_206ax.h>
+#include <elog.h>
+
+/* Include EC functions */
+#include <ec/google/chromeec/ec.h>
+#include "ec.h"
+
+static u8 mainboard_smi_ec(void)
+{
+	u8 cmd = google_chromeec_get_event();
+
+	/* Log this event */
+	if (cmd)
+		elog_gsmi_add_event_byte(ELOG_TYPE_EC_EVENT, cmd);
+
+	switch (cmd) {
+	case EC_HOST_EVENT_LID_CLOSED:
+		printk(BIOS_DEBUG, "LID CLOSED, SHUTDOWN\n");
+
+		/* Go to S5 */
+		write_pmbase32(PM1_CNT, read_pmbase32(PM1_CNT) | (0xf << 10));
+		break;
+	}
+
+	return cmd;
+}
+
+void mainboard_smi_gpi(u32 gpi_sts)
+{
+	if (gpi_sts & (1 << EC_SMI_GPI)) {
+		/* Process all pending events */
+		while (mainboard_smi_ec() != 0);
+	}
+}
+
+void mainboard_smi_sleep(u8 slp_typ)
+{
+	/* Disable USB charging if required */
+	switch (slp_typ) {
+	case ACPI_S3:
+		if (gnvs->s3u0 == 0)
+			google_chromeec_set_usb_charge_mode(
+				0, USB_CHARGE_MODE_DISABLED);
+		if (gnvs->s3u1 == 0)
+			google_chromeec_set_usb_charge_mode(
+				1, USB_CHARGE_MODE_DISABLED);
+		break;
+	case ACPI_S5:
+		if (gnvs->s5u0 == 0)
+			google_chromeec_set_usb_charge_mode(
+				0, USB_CHARGE_MODE_DISABLED);
+		if (gnvs->s5u1 == 0)
+			google_chromeec_set_usb_charge_mode(
+				1, USB_CHARGE_MODE_DISABLED);
+		break;
+	}
+
+	/* Disable SCI and SMI events */
+	google_chromeec_set_smi_mask(0);
+	google_chromeec_set_sci_mask(0);
+
+	/* Clear pending events that may trigger immediate wake */
+	while (google_chromeec_get_event() != 0);
+
+	/* Enable wake events */
+	google_chromeec_set_wake_mask(LINK_EC_S3_WAKE_EVENTS);
+}
+
+int mainboard_smi_apmc(u8 apmc)
+{
+	switch (apmc) {
+	case APM_CNT_ACPI_ENABLE:
+		google_chromeec_set_smi_mask(0);
+		/* Clear all pending events */
+		while (google_chromeec_get_event() != 0);
+		google_chromeec_set_sci_mask(LINK_EC_SCI_EVENTS);
+		break;
+	case APM_CNT_ACPI_DISABLE:
+		google_chromeec_set_sci_mask(0);
+		/* Clear all pending events */
+		while (google_chromeec_get_event() != 0);
+		google_chromeec_set_smi_mask(LINK_EC_SMI_EVENTS);
+		break;
+	}
+	return 0;
+}
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