From e28846a0e89bfed307d792f8f5f128f5914a91fc Mon Sep 17 00:00:00 2001
From: david <david_wu@quantatw.com>
Date: Thu, 10 Dec 2015 16:42:44 +0800
Subject: google/lars: Enable TPM PIRQ

Enable the config option for TPM to use PIRQ instead of SERIRQ
and enable the MAINBOARD_HAS_LPC_TPM option.

BUG=none
BRANCH=none
TEST=tested this patch with TPM ACPI driver(tpm_tis.force=0)

Change-Id: I761d623d1064b8030f2703500d174259bb20ca79
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 2f7bdb1091b7dd62a3c0b4a2272ab9f56fd7acc9
Original-Change-Id: Id1a867980d2e28a1f328aa36bed3c846b2137bec
Original-Signed-off-by: David Wu <David_Wu@quantatw.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/317471
Original-Commit-Ready: David Wu <david_wu@quantatw.com>
Original-Tested-by: David Wu <david_wu@quantatw.com>
Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://review.coreboot.org/12974
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
---
 src/mainboard/google/lars/Kconfig | 4 ++++
 1 file changed, 4 insertions(+)

(limited to 'src/mainboard/google/lars')

diff --git a/src/mainboard/google/lars/Kconfig b/src/mainboard/google/lars/Kconfig
index e227d4d375..fd6bdd4ea9 100644
--- a/src/mainboard/google/lars/Kconfig
+++ b/src/mainboard/google/lars/Kconfig
@@ -52,6 +52,10 @@ config MAX_CPUS
 	int
 	default 8
 
+config TPM_PIRQ
+	hex
+	default 0x18  # GPP_E0_IRQ
+
 config INCLUDE_NHLT_BLOBS
 	bool "Include blobs for audio."
 	select NHLT_DMIC_2CH
-- 
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