From 0688ab8d95f18f718510cc17aeb01a47519a9a5a Mon Sep 17 00:00:00 2001 From: Tristan Shieh Date: Fri, 19 Oct 2018 17:29:23 +0800 Subject: google/kukui: Support TPM Init SPI bus 0 to connect TPM, configure interrupt type of GPIO CR50_IRQ, implement tis_plat_irq_status(), and set up chromeos GPIO table for TPM interrupt. BUG=b:80501386 BRANCH=none Test=Boots correctly on Kukui. Change-Id: Ieaa6ae65fbfb5ab6323e226e8171dd7a992c3a39 Signed-off-by: Tristan Shieh Reviewed-on: https://review.coreboot.org/c/29192 Tested-by: build bot (Jenkins) Reviewed-by: Julius Werner --- src/mainboard/google/kukui/verstage.c | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) create mode 100644 src/mainboard/google/kukui/verstage.c (limited to 'src/mainboard/google/kukui/verstage.c') diff --git a/src/mainboard/google/kukui/verstage.c b/src/mainboard/google/kukui/verstage.c new file mode 100644 index 0000000000..9bf93bf687 --- /dev/null +++ b/src/mainboard/google/kukui/verstage.c @@ -0,0 +1,26 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2018 MediaTek Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include + +#include "gpio.h" + +void verstage_mainboard_init(void) +{ + mtk_spi_init(CONFIG_DRIVER_TPM_SPI_BUS, SPI_PAD0_MASK, 1 * MHz); + gpio_eint_configure(CR50_IRQ, IRQ_TYPE_EDGE_RISING); +} -- cgit v1.2.3