From 1e504f7811273b5a6a94bb82b94031112069dd56 Mon Sep 17 00:00:00 2001 From: Tristan Shieh Date: Mon, 28 Jan 2019 13:28:14 +0800 Subject: google/kukui: Implement HW reset function Asserting GPIO PERIPHERAL_EN8 will send a signal to EC to trigger a HW reset for SoC and H1. BUG=b:80501386 BRANCH=none TEST=emerge-kukui coreboot; manually verified the do_board_reset() on Kukui P1 Change-Id: I9afad84af2031a766bc08fc76c8b5f55588c453a Signed-off-by: Tristan Shieh Reviewed-on: https://review.coreboot.org/c/31118 Reviewed-by: Paul Menzel Reviewed-by: Julius Werner Tested-by: build bot (Jenkins) --- src/mainboard/google/kukui/Makefile.inc | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'src/mainboard/google/kukui/Makefile.inc') diff --git a/src/mainboard/google/kukui/Makefile.inc b/src/mainboard/google/kukui/Makefile.inc index acd2c45417..9f8c313e74 100644 --- a/src/mainboard/google/kukui/Makefile.inc +++ b/src/mainboard/google/kukui/Makefile.inc @@ -4,15 +4,18 @@ bootblock-y += boardid.c bootblock-y += bootblock.c bootblock-y += chromeos.c bootblock-y += memlayout.ld +bootblock-y += reset.c decompressor-y += memlayout.ld verstage-y += chromeos.c +verstage-y += reset.c verstage-y += verstage.c verstage-y += memlayout.ld romstage-y += boardid.c romstage-y += chromeos.c romstage-y += memlayout.ld +romstage-y += reset.c romstage-y += romstage.c romstage-y += sdram_configs.c @@ -20,3 +23,4 @@ ramstage-y += boardid.c ramstage-y += chromeos.c ramstage-y += mainboard.c ramstage-y += memlayout.ld +ramstage-y += reset.c -- cgit v1.2.3