From eb75f7c360dc6660abfc43bcee717f67c1fa56b2 Mon Sep 17 00:00:00 2001 From: Akshu Agrawal Date: Thu, 11 Oct 2018 15:31:40 +0530 Subject: mb/google/kahlee: Set stapm parameters with time value fixed stapm_time passed to smu via agesa is in msec. With earlier value smu was getting stapm_time as 2.5 sec instead of 2500 sec and thus causing issue in S3, and audio in PsppBalanceLow state. BUG=b:117569918, b:117252463 TEST= 1.) audio works with PsppBalanceLow 2.) S3 cycles Change-Id: I673e7e673d042918dff47141f37bbca354f5c45c Signed-off-by: Akshu Agrawal Reviewed-on: https://review.coreboot.org/29027 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth Reviewed-by: Marc Jones Reviewed-by: Raul Rangel --- src/mainboard/google/kahlee/variants/careena/devicetree.cb | 8 +++----- src/mainboard/google/kahlee/variants/grunt/devicetree.cb | 8 +++----- 2 files changed, 6 insertions(+), 10 deletions(-) (limited to 'src/mainboard/google/kahlee') diff --git a/src/mainboard/google/kahlee/variants/careena/devicetree.cb b/src/mainboard/google/kahlee/variants/careena/devicetree.cb index e0909f2fce..ad760b53e3 100644 --- a/src/mainboard/google/kahlee/variants/careena/devicetree.cb +++ b/src/mainboard/google/kahlee/variants/careena/devicetree.cb @@ -20,11 +20,9 @@ chip soc/amd/stoneyridge register "dram_clear_on_reset" = "DRAM_CONTENTS_KEEP" register "uma_mode" = "UMAMODE_SPECIFIED_SIZE" register "uma_size" = "32 * MiB" - - # Don't set STAPM values for now - # register "stapm_percent" = "68" - # register "stapm_time" = "2500" - # register "stapm_power" = "7800" + register "stapm_percent" = "68" + register "stapm_time" = "2500000" + register "stapm_power" = "7800" # Enable I2C0 for audio, USB3 hub at 400kHz register "i2c[0]" = "{ diff --git a/src/mainboard/google/kahlee/variants/grunt/devicetree.cb b/src/mainboard/google/kahlee/variants/grunt/devicetree.cb index ab56866f6b..8af3f9c356 100644 --- a/src/mainboard/google/kahlee/variants/grunt/devicetree.cb +++ b/src/mainboard/google/kahlee/variants/grunt/devicetree.cb @@ -20,11 +20,9 @@ chip soc/amd/stoneyridge register "dram_clear_on_reset" = "DRAM_CONTENTS_KEEP" register "uma_mode" = "UMAMODE_SPECIFIED_SIZE" register "uma_size" = "32 * MiB" - - # For now, don't set STAPM values - # register "stapm_percent" = "80" - # register "stapm_time" = "2500" - # register "stapm_power" = "7800" + register "stapm_percent" = "80" + register "stapm_time" = "2500000" + register "stapm_power" = "7800" # Enable I2C0 for audio, USB3 hub at 400kHz register "i2c[0]" = "{ -- cgit v1.2.3