From 089b6857615a3bbf9c28b8e658da6b768650692f Mon Sep 17 00:00:00 2001 From: Kevin Chiu Date: Fri, 3 Aug 2018 18:52:18 +0800 Subject: google/grunt: Override BayHub EMMC driving strength Careena EVT SanDisk EMMC sku has high fail rate of 0x5B reboot failure. It'll need to increase 1.8V EMMC CLK/CMD, Data driving strength for this issue. CLK[6:4] CMD,DATA[3:1] original register value: 0x6B enhanced: 0x7F BUG=b:111964336 BRANCH=master TEST=emerge-grunt coreboot Change-Id: I3db38ff12c566c258895c6643008a0472ca528bb Signed-off-by: Kevin Chiu Reviewed-on: https://review.coreboot.org/27816 Reviewed-by: Martin Roth Reviewed-by: Paul Menzel Tested-by: build bot (Jenkins) --- .../google/kahlee/variants/baseboard/mainboard.c | 26 +++++++++++++++++++++- 1 file changed, 25 insertions(+), 1 deletion(-) (limited to 'src/mainboard/google/kahlee') diff --git a/src/mainboard/google/kahlee/variants/baseboard/mainboard.c b/src/mainboard/google/kahlee/variants/baseboard/mainboard.c index 54743ef7c1..b1bd4928d2 100644 --- a/src/mainboard/google/kahlee/variants/baseboard/mainboard.c +++ b/src/mainboard/google/kahlee/variants/baseboard/mainboard.c @@ -17,7 +17,8 @@ #include #include #include - +#include +#include uint8_t variant_board_sku(void) { @@ -36,3 +37,26 @@ void variant_mainboard_suspend_resume(void) gpio_set(GPIO_133, 0); } #endif + +void bh720_driving_strength(struct device *dev) +{ + u32 sdbar; + u32 bh720_pcr_data; + + sdbar = pci_read_config32(dev, PCI_BASE_ADDRESS_1); + + /* Enable Memory Access Function */ + write32((void *)(sdbar + BH720_MEM_ACCESS_EN), 0x40000000); + write32((void *)(sdbar + BH720_MEM_RW_DATA), 0x80000000); + write32((void *)(sdbar + BH720_MEM_RW_ADR), 0x800000D0); + + /* Read current EMMC 1.8V CLK/DATA,CMD driving strength */ + write32((void *)(sdbar + BH720_MEM_RW_ADR), 0x40000304); + bh720_pcr_data = read32((void *)(sdbar + BH720_MEM_RW_DATA)); + + /* set EMMC 1.8V CLK/DATA,CMD the max level */ + write32((void *)(sdbar + BH720_MEM_RW_DATA), + bh720_pcr_data | (BH720_PCR_CLK_DRV_MAX << 4) | + (BH720_PCR_DATA_CMD_DRV_MAX << 1)); + write32((void *)(sdbar + BH720_MEM_RW_ADR), 0x80000304); +} -- cgit v1.2.3