From 97ab880082505b4aa0d4b2a058e850bd3376d9b8 Mon Sep 17 00:00:00 2001 From: Chris Ching Date: Tue, 6 Feb 2018 10:28:49 -0700 Subject: mainboard/google/kahlee: Add tis_plat_irq_status For variants that have a cr50 tpm, this enables faster polling when interacting with the tpm. BUG=b:72838769 BRANCH=none TEST=verified on grunt that irq is used and not timeouts for tpm Change-Id: I5786d334b6c1cc70f4c7107c75b07a7e27ac4428 Signed-off-by: Chris Ching Signed-off-by: Martin Roth Reviewed-on: https://review.coreboot.org/23626 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/mainboard/google/kahlee/bootblock/bootblock.c | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'src/mainboard/google/kahlee/bootblock') diff --git a/src/mainboard/google/kahlee/bootblock/bootblock.c b/src/mainboard/google/kahlee/bootblock/bootblock.c index 244abe051f..4a65d8f4fc 100644 --- a/src/mainboard/google/kahlee/bootblock/bootblock.c +++ b/src/mainboard/google/kahlee/bootblock/bootblock.c @@ -15,8 +15,10 @@ #include #include +#include #include #include +#include void bootblock_mainboard_init(void) { @@ -30,4 +32,11 @@ void bootblock_mainboard_init(void) /* Setup TPM decode before verstage */ sb_tpm_decode_spi(); + + /* Configure cr50 interrupt pin for use in polling tpm status */ + if (IS_ENABLED(CONFIG_MAINBOARD_HAS_TPM_CR50)) { + const uint32_t flags = GPIO_EDGEL_TRIG | GPIO_ACTIVE_LOW | + GPIO_INT_STATUS_EN; + gpio_set_interrupt(H1_PCH_INT, flags); + } } -- cgit v1.2.3