From 570645dc2af26ec26cc8a453f43585bc82fc2521 Mon Sep 17 00:00:00 2001 From: Zheng Bao Date: Wed, 3 Nov 2021 10:25:03 +0800 Subject: amdfwtool: Call the set_efs_table for Stoneyridge Related to https://review.coreboot.org/c/coreboot/+/58555 commit-id: 35b7e0a2d82ac In 58555, we added the SOC ID for Stoneyridge in amdfwtool command line. But it raised building error because it then called "set_efs_table" without setting SPI mode. So we skipped calling that. But in set_efs_table, it has case for Stoneyridge. The boards also need to have this setting. So we remove the skipping and give the proper SPI mode in mainboard Kconfig. Change-Id: I24499ff6daf7878b12b6044496f53379116c598f Signed-off-by: Zheng Bao Reviewed-on: https://review.coreboot.org/c/coreboot/+/58871 Tested-by: build bot (Jenkins) Reviewed-by: Felix Held --- src/mainboard/google/kahlee/Kconfig | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'src/mainboard/google/kahlee/Kconfig') diff --git a/src/mainboard/google/kahlee/Kconfig b/src/mainboard/google/kahlee/Kconfig index 5940d1a2b6..29edb3053f 100644 --- a/src/mainboard/google/kahlee/Kconfig +++ b/src/mainboard/google/kahlee/Kconfig @@ -123,6 +123,14 @@ config OEM_BIN_FILE depends on USE_OEM_BIN default "" +if !EM100 +config EFS_SPI_READ_MODE + default 4 # Dual IO (1-2-2) + +config EFS_SPI_SPEED + default 0 # 66MHz +endif + # Don't use AMD's Secure OS config USE_PSPSECUREOS def_bool n -- cgit v1.2.3