From de7f0736a16edb8d34df6e057b87a0bc1fbf7874 Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Thu, 21 Jun 2018 15:04:51 +0300 Subject: mb/*/chromeos.c: Fix PRE_RAM and unify style MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: I99b9c0452ed0e6d580edb5a4f3317d776085b382 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/30399 Reviewed-by: Arthur Heymans Tested-by: build bot (Jenkins) --- src/mainboard/google/jecht/chromeos.c | 25 ++++++++++++------------- 1 file changed, 12 insertions(+), 13 deletions(-) (limited to 'src/mainboard/google/jecht') diff --git a/src/mainboard/google/jecht/chromeos.c b/src/mainboard/google/jecht/chromeos.c index c2e5a2be0a..d7e48a0d40 100644 --- a/src/mainboard/google/jecht/chromeos.c +++ b/src/mainboard/google/jecht/chromeos.c @@ -50,32 +50,32 @@ void fill_lb_gpios(struct lb_gpios *gpios) int get_write_protect_state(void) { -#ifdef __PRE_RAM__ - pci_devfn_t dev; - dev = PCI_DEV(0, 0x1f, 2); +#ifdef __SIMPLE_DEVICE__ + pci_devfn_t dev = PCI_DEV(0, 0x1f, 2); #else - struct device *dev; - dev = dev_find_slot(0, PCI_DEVFN(0x1f, 2)); + struct device *dev = pcidev_on_root(0x1f, 2); #endif return (pci_read_config32(dev, SATA_SP) >> FLAG_SPI_WP) & 1; } int get_recovery_mode_switch(void) { -#ifdef __PRE_RAM__ - pci_devfn_t dev; - dev = PCI_DEV(0, 0x1f, 2); +#ifdef __SIMPLE_DEVICE__ + pci_devfn_t dev = PCI_DEV(0, 0x1f, 2); #else - struct device *dev; - dev = dev_find_slot(0, PCI_DEVFN(0x1f, 2)); + struct device *dev = pcidev_on_root(0x1f, 2); #endif return (pci_read_config32(dev, SATA_SP) >> FLAG_REC_MODE) & 1; } -#ifdef __PRE_RAM__ void init_bootmode_straps(void) { u32 flags = 0; +#ifdef __SIMPLE_DEVICE__ + pci_devfn_t dev = PCI_DEV(0, 0x1f, 2); +#else + struct device *dev = pcidev_on_root(0x1f, 2); +#endif /* Write Protect: GPIO58 = GPIO_SPI_WP, active high */ if (get_gpio(GPIO_SPI_WP)) @@ -87,9 +87,8 @@ void init_bootmode_straps(void) /* Developer: Virtual */ - pci_write_config32(PCI_DEV(0, 0x1f, 2), SATA_SP, flags); + pci_write_config32(dev, SATA_SP, flags); } -#endif static const struct cros_gpio cros_gpios[] = { CROS_GPIO_REC_AL(GPIO_REC_MODE, CROS_GPIO_DEVICE_NAME), -- cgit v1.2.3