From 04746fc22c667506da528394ca6764656b05657e Mon Sep 17 00:00:00 2001 From: Patrick Georgi Date: Fri, 5 Jun 2015 18:53:43 +0200 Subject: google/jecht: add new mainboard Taken from CrOS, including everything up to commit da4c33913. Adapted to upstream. Change-Id: I095e6726a220200ba17719fc05fcdc521da484e8 Signed-off-by: Patrick Georgi Reviewed-on: http://review.coreboot.org/10432 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer --- src/mainboard/google/jecht/Kconfig | 50 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 50 insertions(+) create mode 100644 src/mainboard/google/jecht/Kconfig (limited to 'src/mainboard/google/jecht/Kconfig') diff --git a/src/mainboard/google/jecht/Kconfig b/src/mainboard/google/jecht/Kconfig new file mode 100644 index 0000000000..fbf61def00 --- /dev/null +++ b/src/mainboard/google/jecht/Kconfig @@ -0,0 +1,50 @@ +if BOARD_GOOGLE_JECHT + +config BOARD_SPECIFIC_OPTIONS # dummy + def_bool y + select SOC_INTEL_BROADWELL + select BOARD_ROMSIZE_KB_8192 + select SUPERIO_ITE_IT8772F + select VIRTUAL_DEV_SWITCH + select HAVE_ACPI_TABLES + select HAVE_OPTION_TABLE + select HAVE_ACPI_RESUME + select MMCONF_SUPPORT + select HAVE_SMI_HANDLER + select MAINBOARD_HAS_CHROMEOS + select MAINBOARD_HAS_LPC_TPM + select EXTERNAL_MRC_BLOB + select CHROMEOS_RAMOOPS_DYNAMIC + select INTEL_INT15 + select CHROMEOS_VBNV_CMOS + select PHYSICAL_REC_SWITCH + +config MAINBOARD_DIR + string + default google/jecht + +config MAINBOARD_PART_NUMBER + string + default "Jecht" + +config IRQ_SLOT_COUNT + int + default 18 + +config MAX_CPUS + int + default 8 + +config VGA_BIOS_FILE + string + default "pci8086,0166.rom" + +config HAVE_IFD_BIN + bool + default n + +config HAVE_ME_BIN + bool + default n + +endif -- cgit v1.2.3