From 65af8bbe72125eeaf970e5e57102cb802d00fc69 Mon Sep 17 00:00:00 2001 From: Ravi Kumar Bokka Date: Fri, 16 Jul 2021 16:52:34 +0530 Subject: soc/qualcomm/sc7280: DDR One-Time-Training Support Introduce DDR One-Time-Training Support Device reboots without training from second iteration and also DDR training data is 32kb size, hence update required in memlayout and to sync with upstream changes the Fmap size even got bumped up. BUG=b:182963902 TEST=Validated on qualcomm sc7280 development board Change-Id: I81038c5c7802c154f4310509c6c64710580b8ce4 Signed-off-by: Sudheer Kumar Amrabadi Reviewed-on: https://review.coreboot.org/c/coreboot/+/54352 Tested-by: build bot (Jenkins) Reviewed-by: Shelley Chen --- src/mainboard/google/herobrine/chromeos.fmd | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/mainboard/google/herobrine') diff --git a/src/mainboard/google/herobrine/chromeos.fmd b/src/mainboard/google/herobrine/chromeos.fmd index a44a638e98..e85271c113 100644 --- a/src/mainboard/google/herobrine/chromeos.fmd +++ b/src/mainboard/google/herobrine/chromeos.fmd @@ -17,7 +17,7 @@ FLASH@0x0 8M { RW_VPD(PRESERVE) 32K RW_NVRAM(PRESERVE) 16K - RW_DDR_TRAINING(PRESERVE) 8K + RW_MRC_CACHE(PRESERVE) 32K RW_LIMITS_CFG(PRESERVE) 4K RW_ELOG(PRESERVE) 4K RW_SHARED 4K { -- cgit v1.2.3