From bd409ad69f6f33681bc5cde65cc72eedbd8d2abc Mon Sep 17 00:00:00 2001 From: Edward O'Callaghan Date: Fri, 14 Aug 2020 12:27:42 +1000 Subject: mb/google/puff: Select cse_board_reset() strong symbol Since Puff uses CSE Lite SKU that supports in-field CSME updates an additional reset is triggered when jmp from RO to RW during boot. However this reset is not detected by the cr50 running older firmware because the strapping configuration for EFS2 uses PLT_RST_L to assert to cr50 that a AP reset occured. The older cr50 firmware version of 0.0.22 only monitors AP resets via SYS_RESET_L and hence never detects the reset. To mitigate the issue above a modified reset sequence is required to be performed to signal the reset occured and hence a board-specific cse_board_reset() strong symbol is provided to modify the flow accordingly. V.2: Select CHROMEOS_CSE_BOARD_RESET_OVERRIDE common implementation instead of a local variant in mainboard.c BUG=b:162290856 BRANCH=puff TEST=none Change-Id: I27ab9711aedf92b5af7a58f3b5472ce79f78c8fa Signed-off-by: Edward O'Callaghan Reviewed-on: https://review.coreboot.org/c/coreboot/+/44454 Reviewed-by: Sam McNally Reviewed-by: Furquan Shaikh Tested-by: build bot (Jenkins) --- src/mainboard/google/hatch/Kconfig | 1 + 1 file changed, 1 insertion(+) (limited to 'src/mainboard/google/hatch') diff --git a/src/mainboard/google/hatch/Kconfig b/src/mainboard/google/hatch/Kconfig index f3699496ac..a658b2a568 100644 --- a/src/mainboard/google/hatch/Kconfig +++ b/src/mainboard/google/hatch/Kconfig @@ -52,6 +52,7 @@ config CHROMEOS select HAS_RECOVERY_MRC_CACHE select MRC_CLEAR_NORMAL_CACHE_ON_RECOVERY_RETRAIN select VBOOT_LID_SWITCH + select CHROMEOS_CSE_BOARD_RESET_OVERRIDE if BOARD_GOOGLE_BASEBOARD_PUFF config CHROMEOS_WIFI_SAR bool "Enable SAR options for Chrome OS build" -- cgit v1.2.3