From 81a2f45bd2e11ec0cfd699e583eb5e295725b110 Mon Sep 17 00:00:00 2001 From: David Wu Date: Wed, 26 Aug 2020 14:20:32 +0800 Subject: mb/google/puff: Update psyspl2 to 97% of adapter rating Set psyspl2 to 97% of adapter rating, based on our experiment results. BUG=b:160676773 TEST=Built and check firmware log. Signed-off-by: David Wu Change-Id: I4b621a8cc1749ee52a9f16a7ad2ae7a7aa0f7a5a Reviewed-on: https://review.coreboot.org/c/coreboot/+/44805 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan Reviewed-by: Sam McNally Reviewed-by: Daniel Kurtz --- src/mainboard/google/hatch/variants/baseboard/mainboard.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'src/mainboard/google/hatch/variants') diff --git a/src/mainboard/google/hatch/variants/baseboard/mainboard.c b/src/mainboard/google/hatch/variants/baseboard/mainboard.c index 537e3df102..3b247e9fad 100644 --- a/src/mainboard/google/hatch/variants/baseboard/mainboard.c +++ b/src/mainboard/google/hatch/variants/baseboard/mainboard.c @@ -35,10 +35,10 @@ static void wait_for_hpd(gpio_t gpio, long timeout) } /* - * For type-C chargers, set PL2 to 90% of max power to account for + * For type-C chargers, set PL2 to 97% of max power to account for * cable loss and FET Rdson loss in the path from the source. */ -#define SET_PSYSPL2(w) (9 * (w) / 10) +#define SET_PSYSPL2(w) (97 * (w) / 100) #define PUFF_U22_PL2 (35) #define PUFF_U62_U42_PL2 (51) #define PUFF_CELERON_PENTIUM_PSYSPL2 (65) @@ -65,7 +65,7 @@ static void wait_for_hpd(gpio_t gpio, long timeout) * +-------------+-----------------+---------+---------+-------+ * | Max Power(W)| PL2 | PsysPL2 | PsysPL3 | PL4 | * +-------------+-----+-----------+---------+---------+-------+ - * | n | min(0.9n, PL2) | 0.9n | 0.9n | 0.9n | + * | n | min(0.97n, PL2) | 0.97n | 0.97n | 0.97n | * +-------------+-----+-----------+---------+---------+-------+ */ -- cgit v1.2.3