From d5a67aa4a46bdb7e1a70c6a429a63bacf4bbc9db Mon Sep 17 00:00:00 2001 From: Edward O'Callaghan Date: Tue, 21 Jan 2020 15:58:59 +1100 Subject: mainboard/hatch: Fix GPE wake comments The indirection of names is exceedingly confusing for ultimately the single interrupt trace of EC_PCH_WAKE_ODL between the EC gpio#74 to GPD2/LAN_WAKE# on the PCH side. This helps folks chase this indirection down through the code. BUG=b:147026979 BRANCH=none TEST=builds Change-Id: I35d746a202dae06d2f6f1edfaa3889864b09f50d Signed-off-by: Edward O'Callaghan Reviewed-on: https://review.coreboot.org/c/coreboot/+/38491 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh --- src/mainboard/google/hatch/variants/puff/include/variant/ec.h | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) (limited to 'src/mainboard/google/hatch/variants/puff') diff --git a/src/mainboard/google/hatch/variants/puff/include/variant/ec.h b/src/mainboard/google/hatch/variants/puff/include/variant/ec.h index 501fab0dde..12837639dc 100644 --- a/src/mainboard/google/hatch/variants/puff/include/variant/ec.h +++ b/src/mainboard/google/hatch/variants/puff/include/variant/ec.h @@ -54,7 +54,12 @@ /* Enable EC backed PD MCU device in ACPI */ #define EC_ENABLE_PD_MCU_DEVICE -/* Provide wake pin for EC for _PRW WoL method */ +/** + * Defines EC wake pin route. + * Note that GPE_EC_WAKE is defined, confusingly, as + * GPE_LAN_WAK which is GPD2/LAN_WAKE# on the PCH or + * as the line EC_PCH_WAKE_ODL on the schematic. + */ #define EC_ENABLE_WAKE_PIN GPE_EC_WAKE #define SIO_EC_MEMMAP_ENABLE /* EC Memory Map Resources */ -- cgit v1.2.3