From 1bea841b2f5ba8e700039bb3f048dc0e0ba5e52f Mon Sep 17 00:00:00 2001
From: David Wu <david_wu@quanta.corp-partner.google.com>
Date: Fri, 28 Aug 2020 17:02:38 +0800
Subject: mb/google/puff: Set TCC offset to 5 for kaisa and duffy

Set tcc offset to 5 degree celsius for kaisa and duffy

BUG=b:166696500
BRANCH=puff
TEST=Build, and verify test result by thermal team.

Change-Id: I2bb977b98c0764f0b9cac3543074da56057717cf
Signed-off-by: David Wu <david_wu@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44901
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Reviewed-by: Sam McNally <sammc@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
 src/mainboard/google/hatch/variants/kaisa/overridetree.cb | 1 +
 1 file changed, 1 insertion(+)

(limited to 'src/mainboard/google/hatch/variants/kaisa')

diff --git a/src/mainboard/google/hatch/variants/kaisa/overridetree.cb b/src/mainboard/google/hatch/variants/kaisa/overridetree.cb
index dbf1851f32..c6aef059a7 100644
--- a/src/mainboard/google/hatch/variants/kaisa/overridetree.cb
+++ b/src/mainboard/google/hatch/variants/kaisa/overridetree.cb
@@ -1,4 +1,5 @@
 chip soc/intel/cannonlake
+	register "tcc_offset" = "5"	# TCC of 95C
 
 	# Auto-switch between X4 NVMe and X2 NVMe.
 	register "TetonGlacierMode" = "1"
-- 
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