From b7a68d5b05259a07a84a546e6a7e40948ba705ac Mon Sep 17 00:00:00 2001 From: Edward O'Callaghan Date: Fri, 28 Aug 2020 20:14:50 +1000 Subject: mb/google/puff: Convert ASL file to new DPTF dt impl This patch converts the current DPTF policies from static ASL files into the new SSDT-based DPTF implementation. All settings are intended to be copied exactly. BUG=b:158986928 BRANCH=puff TEST=duffy boots and dumped SSDT table for quick check. Change-Id: I45987f44ec381917173f8d2a878edb50da454b4b Signed-off-by: Edward O'Callaghan Reviewed-on: https://review.coreboot.org/c/coreboot/+/44905 Tested-by: build bot (Jenkins) Reviewed-by: Tim Wawrzynczak Reviewed-by: Sam McNally Reviewed-by: Stefan Reinauer --- .../variants/faffy/include/variant/acpi/dptf.asl | 86 ---------------------- .../google/hatch/variants/faffy/overridetree.cb | 35 +++++++++ 2 files changed, 35 insertions(+), 86 deletions(-) delete mode 100644 src/mainboard/google/hatch/variants/faffy/include/variant/acpi/dptf.asl (limited to 'src/mainboard/google/hatch/variants/faffy') diff --git a/src/mainboard/google/hatch/variants/faffy/include/variant/acpi/dptf.asl b/src/mainboard/google/hatch/variants/faffy/include/variant/acpi/dptf.asl deleted file mode 100644 index 40bc66457a..0000000000 --- a/src/mainboard/google/hatch/variants/faffy/include/variant/acpi/dptf.asl +++ /dev/null @@ -1,86 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#define DPTF_CPU_PASSIVE 90 -#define DPTF_CPU_CRITICAL 100 - -#define DPTF_TSR0_SENSOR_ID 0 -#define DPTF_TSR0_SENSOR_NAME "Thermal Sensor 1" -#define DPTF_TSR0_PASSIVE 60 -#define DPTF_TSR0_CRITICAL 85 - -#define DPTF_ENABLE_CHARGER -#define DPTF_ENABLE_FAN_CONTROL - -/* Charger performance states, board-specific values from charger and EC */ -Name (CHPS, Package () { - Package () { 0, 0, 0, 0, 255, 0x6a4, "mA", 0 }, /* 1.7A (MAX) */ - Package () { 0, 0, 0, 0, 24, 0x600, "mA", 0 }, /* 1.5A */ - Package () { 0, 0, 0, 0, 16, 0x400, "mA", 0 }, /* 1.0A */ - Package () { 0, 0, 0, 0, 8, 0x200, "mA", 0 }, /* 0.5A */ -}) - -/* DFPS: Fan Performance States */ -Name (DFPS, Package () { - 0, // Revision - /* - * TODO : Need to update this Table after characterization. - * These are initial reference values. - */ - /* Control, Trip Point, Speed, NoiseLevel, Power */ - Package () {90, 0xFFFFFFFF, 6700, 220, 2200}, - Package () {80, 0xFFFFFFFF, 5800, 180, 1800}, - Package () {70, 0xFFFFFFFF, 5000, 145, 1450}, - Package () {60, 0xFFFFFFFF, 4900, 115, 1150}, - Package () {50, 0xFFFFFFFF, 3838, 90, 900}, - Package () {40, 0xFFFFFFFF, 2904, 55, 550}, - Package () {30, 0xFFFFFFFF, 2337, 30, 300}, - Package () {20, 0xFFFFFFFF, 1608, 15, 150}, - Package () {10, 0xFFFFFFFF, 800, 10, 100}, - Package () {0, 0xFFFFFFFF, 0, 0, 50} -}) - -Name (DART, Package () { - /* Fan effect on CPU */ - 0, // Revision - Package () { - /* - * Source, Target, Weight, AC0, AC1, AC2, AC3, AC4, AC5, AC6, - * AC7, AC8, AC9 - */ - \_SB.DPTF.TFN1, \_SB.PCI0.TCPU, 95, 85, 75, 65, 55, 45, 0, 0, - 0, 0, 0 - }, - Package () { - \_SB.DPTF.TFN1, \_SB.DPTF.TSR0, 95, 85, 75, 65, 55, 45, 0, 0, - 0, 0, 0 - } -}) - -Name (DTRT, Package () { - /* CPU Throttle Effect on CPU */ - Package () { \_SB.PCI0.TCPU, \_SB.PCI0.TCPU, 100, 50, 0, 0, 0, 0 }, - - /* CPU Throttle Effect on Ambient (TSR0) */ - Package () { \_SB.PCI0.TCPU, \_SB.DPTF.TSR0, 100, 60, 0, 0, 0, 0 }, -}) - -Name (MPPC, Package () -{ - 0x2, /* Revision */ - Package () { /* Power Limit 1 */ - 0, /* PowerLimitIndex, 0 for Power Limit 1 */ - 10000, /* PowerLimitMinimum */ - 15000, /* PowerLimitMaximum */ - 28000, /* TimeWindowMinimum */ - 32000, /* TimeWindowMaximum */ - 200 /* StepSize */ - }, - Package () { /* Power Limit 2 */ - 1, /* PowerLimitIndex, 1 for Power Limit 2 */ - 25000, /* PowerLimitMinimum */ - 51000, /* PowerLimitMaximum */ - 28000, /* TimeWindowMinimum */ - 32000, /* TimeWindowMaximum */ - 1000 /* StepSize */ - } -}) diff --git a/src/mainboard/google/hatch/variants/faffy/overridetree.cb b/src/mainboard/google/hatch/variants/faffy/overridetree.cb index 61c7f0f242..a5c8eff09b 100644 --- a/src/mainboard/google/hatch/variants/faffy/overridetree.cb +++ b/src/mainboard/google/hatch/variants/faffy/overridetree.cb @@ -273,6 +273,41 @@ chip soc/intel/cannonlake register "sata_port[1].TxGen3DeEmph" = "0x20" device domain 0 on + device pci 04.0 on + chip drivers/intel/dptf + ## Passive Policy + register "policies.passive[0]" = "DPTF_PASSIVE(CPU, CPU, 90, 5000)" + register "policies.passive[1]" = "DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 60, 5000)" + + ## Critical Policy + register "policies.critical[0]" = "DPTF_CRITICAL(CPU, 100, SHUTDOWN)" + register "policies.critical[1]" = "DPTF_CRITICAL(TEMP_SENSOR_0, 85, SHUTDOWN)" + + ## Power Limits Control + # 10-15W PL1 in 200mW increments, avg over 28-32s interval + # 25-51W PL2 in 1000mW increments, avg over 28-32s interval + register "controls.power_limits.pl1" = "{ + .min_power = 10000, + .max_power = 15000, + .time_window_min = 28 * MSECS_PER_SEC, + .time_window_max = 32 * MSECS_PER_SEC, + .granularity = 200,}" + register "controls.power_limits.pl2" = "{ + .min_power = 25000, + .max_power = 51000, + .time_window_min = 28 * MSECS_PER_SEC, + .time_window_max = 32 * MSECS_PER_SEC, + .granularity = 1000,}" + + ## Charger Performance Control (Control, mA) + register "controls.charger_perf[0]" = "{ 255, 1700 }" + register "controls.charger_perf[1]" = "{ 24, 1500 }" + register "controls.charger_perf[2]" = "{ 16, 1000 }" + register "controls.charger_perf[3]" = "{ 8, 500 }" + + device generic 0 on end + end + end # DPTF 0x1903 device pci 14.0 on chip drivers/usb/acpi device usb 0.0 on -- cgit v1.2.3