From 2031221fbda5100556933fb225f9199b88aeebac Mon Sep 17 00:00:00 2001
From: Patrick Rudolph <patrick.rudolph@9elements.com>
Date: Mon, 14 Dec 2020 16:18:04 +0100
Subject: soc/intel/cannonlake: Change mainboard_silicon_init_params argument

Use FSPS_UPD instead of FSP_S_CONFIG as argument as already done on
xeon_sp and denverton_ns. This allows to set test config UPDs from
mainboard code as well.

Change-Id: I6d67264e22df32b9210ce88b99d6a7a4f6b97ffb
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48644
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by:  Felix Singer <felixsinger@posteo.net>
---
 src/mainboard/google/hatch/ramstage.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'src/mainboard/google/hatch/ramstage.c')

diff --git a/src/mainboard/google/hatch/ramstage.c b/src/mainboard/google/hatch/ramstage.c
index af8810063c..93864b2ad1 100644
--- a/src/mainboard/google/hatch/ramstage.c
+++ b/src/mainboard/google/hatch/ramstage.c
@@ -8,7 +8,7 @@
 #include <variant/gpio.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 
-void mainboard_silicon_init_params(FSP_S_CONFIG *params)
+void mainboard_silicon_init_params(FSPS_UPD *supd)
 {
 	variant_devtree_update();
 }
-- 
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