From 96fbc31027b8e208c264d96c04f45799cea3417e Mon Sep 17 00:00:00 2001 From: Xing Zheng Date: Thu, 19 May 2016 11:39:20 +0800 Subject: rockchip: rk3399: Add support i2s This patch enable and configure the clocks and IOMUX for i2s audio path, and the i2s0 clock is from CPLL. Please refer to TRM V0.3 Part 1 Chapter 3 CRU, P126/P128/P144/P154/P155 for the i2s clock div and gate setting. BRANCH=none BUG=chrome-os-partner:52172 TEST=boot kevin rev1, press ctrl+u and hear the beep voice. Change-Id: Id00baac965c8b9213270ba5516e1ca684e4304a6 Signed-off-by: Martin Roth Original-Commit-Id: 9c58fa7 Original-Change-Id: I130a874a0400712317e5e7a8b3b10a6f04586f68 Original-Signed-off-by: Xing Zheng Original-Reviewed-on: https://chromium-review.googlesource.com/347526 Original-Commit-Ready: Wonjoon Lee Original-Reviewed-by: Vadim Bendebury Reviewed-on: https://review.coreboot.org/15034 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh --- src/mainboard/google/gru/mainboard.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) (limited to 'src/mainboard/google/gru') diff --git a/src/mainboard/google/gru/mainboard.c b/src/mainboard/google/gru/mainboard.c index 54443bc9ff..bbe0224693 100644 --- a/src/mainboard/google/gru/mainboard.c +++ b/src/mainboard/google/gru/mainboard.c @@ -92,6 +92,23 @@ static void configure_sdmmc(void) write32(&rk3399_grf->iomux_sdmmc, IOMUX_SDMMC); } +static void configure_codec(void) +{ + write32(&rk3399_grf->iomux_i2s0, IOMUX_I2S0); + write32(&rk3399_grf->iomux_i2sclk, IOMUX_I2SCLK); + + /* AUDIO IO domain 1.8V voltage selection */ + write32(&rk3399_grf->io_vsel, RK_SETBITS(1 << 1)); + + /* CPU1_P1.8V_AUDIO_PWREN for P1.8_AUDIO */ + gpio_output(GPIO(0, A, 2), 1); + + /* set CPU1_SPK_PA_EN output */ + gpio_output(GPIO(1, A, 2), 0); + + rkclk_configure_i2s(12288000); +} + static void configure_display(void) { /* set pinmux for edp HPD*/ @@ -105,6 +122,7 @@ static void mainboard_init(device_t dev) { configure_sdmmc(); configure_emmc(); + configure_codec(); configure_display(); } -- cgit v1.2.3