From b89bd788bead0f7fe8620e5817222e063c2238da Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Fri, 27 Jul 2018 00:33:34 -0500 Subject: google/caroline: Change debounce time for jack insertion and ejection Adapted from chromium commit 7633daa [caroline: Change debounce time for jack insertion and ejection] We are using max debounce time. During this time line, MICBIAS will be zero because of jack chasis. At the moment we got 0 button (PLAY/PAUSE) We need to reduce this time to below 100ms for caroline device. BUG=b:79559096 TEST=see there is no more irq before jack insertion/ejection irq complete Original-Change-Id: Ib6abdb4ff041823ca89f74cf59e2bfa644bb0d6a Original-Signed-off-by: Seunghwan Kim Original-Reviewed-on: https://chromium-review.googlesource.com/1143109 Original-Reviewed-by: Aaron Durbin Original-Tested-by: Wonjoon Lee Change-Id: I8f605989d6ffc8a75127ed6722e7a37db95029ed Signed-off-by: Matt DeVillier Reviewed-on: https://review.coreboot.org/27659 Reviewed-by: Aaron Durbin Reviewed-by: Paul Menzel Tested-by: build bot (Jenkins) --- src/mainboard/google/glados/variants/caroline/devicetree.cb | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/mainboard/google/glados/variants') diff --git a/src/mainboard/google/glados/variants/caroline/devicetree.cb b/src/mainboard/google/glados/variants/caroline/devicetree.cb index a040714ab4..0c3c8617ac 100644 --- a/src/mainboard/google/glados/variants/caroline/devicetree.cb +++ b/src/mainboard/google/glados/variants/caroline/devicetree.cb @@ -244,8 +244,8 @@ chip soc/intel/skylake register "sar_compare_time" = "0" # 500ns register "sar_sampling_time" = "0" # 2us register "short_key_debounce" = "2" # 100ms - register "jack_insert_debounce" = "7" # 512ms - register "jack_eject_debounce" = "7" # 512ms + register "jack_insert_debounce" = "4" # 64ms + register "jack_eject_debounce" = "4" # 64ms device i2c 1a on end end chip drivers/i2c/generic -- cgit v1.2.3