From d3c58fdc6436b2c4455b07fe764fcae471a65433 Mon Sep 17 00:00:00 2001
From: Arthur Heymans <arthur@aheymans.xyz>
Date: Sun, 27 Oct 2019 07:13:55 +0100
Subject: soc/qualcomm: Link cbmem.c only in romstage

Change-Id: I008fcca024fecf462c4b550b8dedbf4b06e491b8
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36368
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
 src/mainboard/google/gale/mmu.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

(limited to 'src/mainboard/google/gale')

diff --git a/src/mainboard/google/gale/mmu.c b/src/mainboard/google/gale/mmu.c
index bf46f7a0d9..7ac8b9207a 100644
--- a/src/mainboard/google/gale/mmu.c
+++ b/src/mainboard/google/gale/mmu.c
@@ -38,7 +38,8 @@ void setup_dram_mappings(enum dram_state dram)
 		/* Map DMA memory */
 		mmu_config_range(DMA_START, DMA_SIZE, DCACHE_OFF);
 		/* Mark cbmem backing store as ready. */
-		ipq_cbmem_backing_store_ready();
+		if (ENV_ROMSTAGE)
+			ipq_cbmem_backing_store_ready();
 	} else {
 		mmu_disable_range(DRAM_START, DRAM_SIZE);
 		/* Map DMA memory */
-- 
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