From c25b2a18fa42f26a799c55c5e463ecb5f4e4c89e Mon Sep 17 00:00:00 2001 From: Julius Werner Date: Fri, 14 Apr 2017 15:39:23 -0700 Subject: tegra210: Remove fake cpu_reset() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The Tegra210 SoC never had a proper cpu_reset() implementation, so it's pointless to pretend there is one. Most ARM SoCs/boards only define hard_reset() at the moment anyway, so let's stick with that. Change-Id: I40f39921fa99d6dfabf818e7abe7a5732341cf4f Signed-off-by: Julius Werner Reviewed-on: https://review.coreboot.org/19786 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin Reviewed-by: Paul Menzel Reviewed-by: Philippe Mathieu-Daudé --- src/mainboard/google/foster/pmic.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/mainboard/google/foster/pmic.c') diff --git a/src/mainboard/google/foster/pmic.c b/src/mainboard/google/foster/pmic.c index 2e655b59f3..2eeccb2241 100644 --- a/src/mainboard/google/foster/pmic.c +++ b/src/mainboard/google/foster/pmic.c @@ -43,8 +43,8 @@ static void pmic_write_reg(unsigned bus, uint8_t reg, uint8_t val, int delay) if (i2c_writeb(bus, MAX77620_I2C_ADDR, reg, val)) { printk(BIOS_ERR, "%s: reg = 0x%02X, value = 0x%02X failed!\n", __func__, reg, val); - /* Reset the SoC on any PMIC write error */ - cpu_reset(); + /* Reset the board on any PMIC write error */ + hard_reset(); } else { if (delay) udelay(500); -- cgit v1.2.3