From 2ce90903b0302d3b225973ea65402653a5cf3fb0 Mon Sep 17 00:00:00 2001 From: Gaggery Tsai Date: Mon, 15 Jan 2018 22:48:18 +0800 Subject: mb/google/fizz: Remove IccMax settings from DT This patch removes IccMax settings from device tree since they are handled in SoC code from patch e1a75d. BUG=b:71369428 BRANCH=None TEST="USE=fw_debug emerge-fizz chromeos-mrc coreboot chromeos-bootimage" & ensure the IccMax settings passed to FSP are from SoC code. Change-Id: I6b01c50a2589d1722c5bf4aa2f44a9574df818f4 Signed-off-by: Gaggery Tsai Reviewed-on: https://review.coreboot.org/23278 Tested-by: build bot (Jenkins) Reviewed-by: Shelley Chen --- src/mainboard/google/fizz/devicetree.cb | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) (limited to 'src/mainboard/google/fizz/devicetree.cb') diff --git a/src/mainboard/google/fizz/devicetree.cb b/src/mainboard/google/fizz/devicetree.cb index 0af7603aa0..81b5dc5603 100644 --- a/src/mainboard/google/fizz/devicetree.cb +++ b/src/mainboard/google/fizz/devicetree.cb @@ -117,6 +117,7 @@ chip soc/intel/skylake #| IccMax | 7A | 34A | 35A | 35A | #| VrVoltageLimit | 1.52V | 1.52V | 1.52V | 1.52V | #+----------------+-------+-------+-------+-------+ + #Note: IccMax settings are moved to SoC code register "domain_vr_config[VR_SYSTEM_AGENT]" = "{ .vr_config_enable = 1, .psi1threshold = VR_CFG_AMP(20), @@ -126,7 +127,6 @@ chip soc/intel/skylake .psi4enable = 1, .imon_slope = 0x0, .imon_offset = 0x0, - .icc_max = VR_CFG_AMP(7), .voltage_limit = 1520, }" @@ -139,7 +139,6 @@ chip soc/intel/skylake .psi4enable = 1, .imon_slope = 0x0, .imon_offset = 0x0, - .icc_max = VR_CFG_AMP(34), .voltage_limit = 1520, }" @@ -152,7 +151,6 @@ chip soc/intel/skylake .psi4enable = 1, .imon_slope = 0x0, .imon_offset = 0x0, - .icc_max = VR_CFG_AMP(35), .voltage_limit = 1520, }" @@ -165,7 +163,6 @@ chip soc/intel/skylake .psi4enable = 1, .imon_slope = 0x0, .imon_offset = 0x0, - .icc_max = VR_CFG_AMP(35), .voltage_limit = 1520, }" -- cgit v1.2.3