From 5aa64b97db0577f4ba2e83b36fc41d33453cfb3d Mon Sep 17 00:00:00 2001 From: Shelley Chen Date: Fri, 9 Jun 2017 13:05:29 -0700 Subject: google/fizz: Enable cr50 over SPI By default disabled. Will need to add FIZZ_USE_SPI_TPM config to enable. BUG=b:62456589, b:35775024 BRANCH=None TEST=Reboot and ensure that TPM works in verstage CQ-DEPEND=CL:530184 Change-Id: I14ce73a1c3745c996b79c4d4758ca744e63a46b4 Signed-off-by: Shelley Chen Reviewed-on: https://review.coreboot.org/20134 Reviewed-by: Furquan Shaikh Tested-by: build bot (Jenkins) --- src/mainboard/google/fizz/Kconfig | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'src/mainboard/google/fizz/Kconfig') diff --git a/src/mainboard/google/fizz/Kconfig b/src/mainboard/google/fizz/Kconfig index da6e67465b..e160d7fc1d 100644 --- a/src/mainboard/google/fizz/Kconfig +++ b/src/mainboard/google/fizz/Kconfig @@ -5,6 +5,7 @@ config BOARD_SPECIFIC_OPTIONS select BOARD_ID_AUTO select BOARD_ROMSIZE_KB_16384 select DRIVERS_I2C_GENERIC + select DRIVERS_SPI_ACPI select EC_GOOGLE_CHROMEEC select EC_GOOGLE_CHROMEEC_LPC select HAVE_ACPI_RESUME @@ -28,6 +29,10 @@ config DRIVER_TPM_I2C_ADDR depends on FIZZ_USE_I2C_TPM default 0x50 +config DRIVER_TPM_SPI_BUS + depends on FIZZ_USE_SPI_TPM + default 0x1 + config GBB_HWID string depends on CHROMEOS @@ -65,6 +70,14 @@ config FIZZ_USE_I2C_TPM select MAINBOARD_HAS_I2C_TPM_CR50 select TPM2 +# Select this option to enable use of cr50 I2C TPM on fizz. +config FIZZ_USE_SPI_TPM + bool + default n + select MAINBOARD_HAS_SPI_TPM_CR50 + select SPI_TPM + select TPM2 + config TPM_TIS_ACPI_INTERRUPT int default 64 # GPE0_DW2_00 (GPP_E0) -- cgit v1.2.3