From ce0a56419854d8c2bd0fac401c76139106fc4dd8 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Thu, 12 Jan 2017 12:19:21 -0600 Subject: Combine Baytrail ChromeOS devices using variant scheme Combine existing boards google/enguarde and google/ninja using their common reference board google/rambi as a baseboard. Variants contain board specific data: - DPTF ACPI components - I2C ACPI devices - RAM config / SPD data - devicetree config - GPIOs - board-specific HW components (e.g., LAN) Additionally, some minor cleanup/changes were made: - remove unused ACPI trackpad/touchscreen devices - correct I2C addresses in SMBIOS entries - clean up comment formatting - remove ACPI device for unused light sensor - switch I2C ACPI devices from edge to level triggered interrupts, for better compatibility/functionality (and to be consistent with other recently-upstreamed ChromeOS devices) The existing enguarde and ninja boards are removed. Variant setup modeled after google/auron Change-Id: Iae7855af9a224fd4cb948b854494e39b545ad449 Signed-off-by: Matt DeVillier Reviewed-on: https://review.coreboot.org/18129 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth --- src/mainboard/google/enguarde/acpi/dptf.asl | 87 ---------- src/mainboard/google/enguarde/acpi/ec.asl | 20 --- src/mainboard/google/enguarde/acpi/mainboard.asl | 196 ----------------------- src/mainboard/google/enguarde/acpi/superio.asl | 27 ---- src/mainboard/google/enguarde/acpi/video.asl | 39 ----- 5 files changed, 369 deletions(-) delete mode 100644 src/mainboard/google/enguarde/acpi/dptf.asl delete mode 100644 src/mainboard/google/enguarde/acpi/ec.asl delete mode 100644 src/mainboard/google/enguarde/acpi/mainboard.asl delete mode 100644 src/mainboard/google/enguarde/acpi/superio.asl delete mode 100644 src/mainboard/google/enguarde/acpi/video.asl (limited to 'src/mainboard/google/enguarde/acpi') diff --git a/src/mainboard/google/enguarde/acpi/dptf.asl b/src/mainboard/google/enguarde/acpi/dptf.asl deleted file mode 100644 index cf82fa6e0f..0000000000 --- a/src/mainboard/google/enguarde/acpi/dptf.asl +++ /dev/null @@ -1,87 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#define DPTF_CPU_PASSIVE 80 -#define DPTF_CPU_CRITICAL 90 - -#define DPTF_TSR0_SENSOR_ID 1 -#define DPTF_TSR0_SENSOR_NAME "TMP432_Internal" -#define DPTF_TSR0_PASSIVE 48 -#define DPTF_TSR0_CRITICAL 70 - -#define DPTF_TSR1_SENSOR_ID 2 -#define DPTF_TSR1_SENSOR_NAME "TMP432_Power_top" -#define DPTF_TSR1_PASSIVE 60 -#define DPTF_TSR1_CRITICAL 70 - -#define DPTF_TSR2_SENSOR_ID 3 -#define DPTF_TSR2_SENSOR_NAME "TMP432_CPU_bottom" -#define DPTF_TSR2_PASSIVE 55 -#define DPTF_TSR2_CRITICAL 70 - -#define DPTF_ENABLE_CHARGER - -/* Charger performance states, board-specific values from charger and EC */ -Name (CHPS, Package () { - Package () { 0, 0, 0, 0, 255, 0x6a4, "mA", 0 }, /* 1.7A (MAX) */ - Package () { 0, 0, 0, 0, 24, 0x600, "mA", 0 }, /* 1.5A */ - Package () { 0, 0, 0, 0, 16, 0x400, "mA", 0 }, /* 1.0A */ - Package () { 0, 0, 0, 0, 8, 0x200, "mA", 0 }, /* 0.5A */ - Package () { 0, 0, 0, 0, 0, 0x080, "mA", 0 }, /* 0.128A */ -}) - -/* Mainboard specific _PDL is 1GHz */ -Name (MPDL, 8) - -Name (DTRT, Package () { - /* CPU Throttle Effect on CPU */ - Package () { \_SB.DPTF.TCPU, \_SB.DPTF.TCPU, 100, 50, 0, 0, 0, 0 }, - - /* CPU Effect on Temp Sensor 0 */ - Package () { \_SB.DPTF.TCPU, \_SB.DPTF.TSR0, 100, 600, 0, 0, 0, 0 }, - -#ifdef DPTF_ENABLE_CHARGER - /* Charger Effect on Temp Sensor 1 */ - Package () { \_SB.DPTF.TCHG, \_SB.DPTF.TSR1, 200, 600, 0, 0, 0, 0 }, -#endif - - /* CPU Effect on Temp Sensor 1 */ - Package () { \_SB.DPTF.TCPU, \_SB.DPTF.TSR1, 100, 600, 0, 0, 0, 0 }, - - /* CPU Effect on Temp Sensor 2 */ - Package () { \_SB.DPTF.TCPU, \_SB.DPTF.TSR2, 100, 600, 0, 0, 0, 0 }, -}) - -Name (MPPC, Package () -{ - 0x2, // Revision - Package () { // Power Limit 1 - 0, // PowerLimitIndex, 0 for Power Limit 1 - 1600, // PowerLimitMinimum - 6200, // PowerLimitMaximum - 1000, // TimeWindowMinimum - 1000, // TimeWindowMaximum - 200 // StepSize - }, - Package () { // Power Limit 2 - 1, // PowerLimitIndex, 1 for Power Limit 2 - 8000, // PowerLimitMinimum - 8000, // PowerLimitMaximum - 1000, // TimeWindowMinimum - 1000, // TimeWindowMaximum - 1000 // StepSize - } -}) - -/* Include Baytrail DPTF */ -#include diff --git a/src/mainboard/google/enguarde/acpi/ec.asl b/src/mainboard/google/enguarde/acpi/ec.asl deleted file mode 100644 index fb81ae08ec..0000000000 --- a/src/mainboard/google/enguarde/acpi/ec.asl +++ /dev/null @@ -1,20 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2014 Google Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -/* mainboard configuration */ -#include - -/* ACPI code for EC functions */ -#include diff --git a/src/mainboard/google/enguarde/acpi/mainboard.asl b/src/mainboard/google/enguarde/acpi/mainboard.asl deleted file mode 100644 index 939648559d..0000000000 --- a/src/mainboard/google/enguarde/acpi/mainboard.asl +++ /dev/null @@ -1,196 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2014 Google Inc. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2 of - * the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include - -Scope (\_SB) -{ - Device (LID0) - { - Name (_HID, EisaId ("PNP0C0D")) - Name (_PRW, Package() { BOARD_PCH_WAKE_GPIO, 0x5 }) - Method (_LID, 0) - { - Store (\_SB.PCI0.LPCB.EC0.LIDS, \LIDS) - Return (\LIDS) - } - } - - Device (PWRB) - { - Name (_HID, EisaId ("PNP0C0C")) - Name (_UID, 1) - } - - /* Wake device for touchpad */ - Device (TPAD) - { - Name (_HID, EisaId ("PNP0C0E")) - Name (_UID, 1) - Name (_PRW, Package() { BOARD_TRACKPAD_WAKE_GPIO, 0x3 }) - - Name (RBUF, ResourceTemplate() - { - Interrupt (ResourceConsumer, Edge, ActiveLow) - { - BOARD_TRACKPAD_IRQ - } - }) - - Method (_CRS) - { - /* Return interrupt if I2C1 is PCI mode */ - If (LEqual (\S1EN, 0)) { - Return (^RBUF) - } - - /* Return empty resource template otherwise */ - Return (ResourceTemplate() {}) - } - } -} - -Scope (\_SB.I2C1) -{ - Device (ETPA) - { - Name (_HID, "ELAN0000") - Name (_DDN, "Elan Touchpad") - Name (_UID, 3) - Name (ISTP, 1) /* Touchpad */ - - Name (_CRS, ResourceTemplate() - { - I2cSerialBus ( - BOARD_TRACKPAD_I2C_ADDR, // SlaveAddress - ControllerInitiated, // SlaveMode - 400000, // ConnectionSpeed - AddressingMode7Bit, // AddressingMode - "\\_SB.I2C1", // ResourceSource - ) - Interrupt (ResourceConsumer, Edge, ActiveLow) - { - BOARD_TRACKPAD_IRQ - } - }) - - Method (_STA) - { - If (LEqual (\S1EN, 1)) { - Return (0xF) - } Else { - Return (0x0) - } - } - - /* Allow device to power off in S0 */ - Name (_S0W, 4) - } -} - -Scope (\_SB.I2C2) -{ - Device (CODC) - { - /* - * TODO(dlaurie): Need official HID. - * - * The current HID is created from the Maxim Integrated - * PCI Vendor ID 193Ch and a shortened device identifier. - */ - Name (_HID, "193C9890") - Name (_DDN, "Maxim 98090 Codec") - Name (_UID, 1) - - Name (_CRS, ResourceTemplate() - { - I2cSerialBus ( - 0x10, // SlaveAddress - ControllerInitiated, // SlaveMode - 400000, // ConnectionSpeed - AddressingMode7Bit, // AddressingMode - "\\_SB.I2C2", // ResourceSource - ) - Interrupt (ResourceConsumer, Edge, ActiveLow) - { - BOARD_CODEC_IRQ - } - }) - - Method (_STA) - { - If (LEqual (\S2EN, 1)) { - Return (0xF) - } Else { - Return (0x0) - } - } - } -} - -Scope (\_SB.I2C5) -{ - Device (ALSI) - { - /* - * TODO(dlaurie): Need official HID. - * - * The current HID is created from the Intersil PNP - * Vendor ID "LSD" and a shortened device identifier. - */ - Name (_HID, EisaId ("LSD2918")) - Name (_DDN, "Intersil 29018 Ambient Light Sensor") - Name (_UID, 1) - - Name (_CRS, ResourceTemplate() - { - I2cSerialBus ( - 0x44, // SlaveAddress - ControllerInitiated, // SlaveMode - 400000, // ConnectionSpeed - AddressingMode7Bit, // AddressingMode - "\\_SB.I2C5", // ResourceSource - ) - Interrupt (ResourceConsumer, Edge, ActiveLow) - { - BOARD_ALS_IRQ - } - }) - - Method (_STA) - { - If (LEqual (\S5EN, 1)) { - Return (0xF) - } Else { - Return (0x0) - } - } - } -} - -Scope (\_SB.LPEA) -{ - Name (GBUF, ResourceTemplate () - { - /* Jack Detect (index 0) */ - GpioInt (Edge, ActiveHigh, Exclusive, PullNone,, - "\\_SB.GPSC") { 14 } - - /* Mic Detect (index 1) */ - GpioInt (Edge, ActiveHigh, Exclusive, PullNone,, - "\\_SB.GPSC") { 15 } - }) -} diff --git a/src/mainboard/google/enguarde/acpi/superio.asl b/src/mainboard/google/enguarde/acpi/superio.asl deleted file mode 100644 index b8d7be0e51..0000000000 --- a/src/mainboard/google/enguarde/acpi/superio.asl +++ /dev/null @@ -1,27 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2014 Google Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -/* mainboard configuration */ -#include -#include - -#define SIO_EC_MEMMAP_ENABLE // EC Memory Map Resources -#define SIO_EC_HOST_ENABLE // EC Host Interface Resources -#define SIO_EC_ENABLE_PS2K // Enable PS/2 Keyboard -// Override default IRQ settings -#define SIO_EC_PS2K_IRQ Interrupt(ResourceConsumer, Edge, ActiveLow) {BOARD_I8042_IRQ} - -/* ACPI code for EC SuperIO functions */ -#include diff --git a/src/mainboard/google/enguarde/acpi/video.asl b/src/mainboard/google/enguarde/acpi/video.asl deleted file mode 100644 index 1405b04031..0000000000 --- a/src/mainboard/google/enguarde/acpi/video.asl +++ /dev/null @@ -1,39 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007-2009 coresystems GmbH - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -// Brightness write -Method (BRTW, 1, Serialized) -{ - // TODO -} - -// Hot Key Display Switch -Method (HKDS, 1, Serialized) -{ - // TODO -} - -// Lid Switch Display Switch -Method (LSDS, 1, Serialized) -{ - // TODO -} - -// Brightness Notification -Method(BRTN,1,Serialized) -{ - // TODO (no displays defined yet) -} - -- cgit v1.2.3