From a64b4f454894988a9c043d53d00b493852f261a3 Mon Sep 17 00:00:00 2001 From: Michael Niewöhner Date: Thu, 15 Oct 2020 00:36:29 +0200 Subject: mb/*,soc/intel: drop the obsolete dt option `speed_shift_enable` MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The dt option `speed_shift_enable` is obsolete now. Drop it. Change-Id: I5ac3b8efe37aedd442962234478fcdce675bf105 Signed-off-by: Michael Niewöhner Reviewed-on: https://review.coreboot.org/c/coreboot/+/46462 Tested-by: build bot (Jenkins) Reviewed-by: Felix Singer Reviewed-by: Frans Hendriks --- src/mainboard/google/drallion/variants/drallion/devicetree.cb | 1 - 1 file changed, 1 deletion(-) (limited to 'src/mainboard/google/drallion') diff --git a/src/mainboard/google/drallion/variants/drallion/devicetree.cb b/src/mainboard/google/drallion/variants/drallion/devicetree.cb index aa6af87c3a..de3b5ca8ea 100644 --- a/src/mainboard/google/drallion/variants/drallion/devicetree.cb +++ b/src/mainboard/google/drallion/variants/drallion/devicetree.cb @@ -40,7 +40,6 @@ chip soc/intel/cannonlake # USB2 PHY Power gating register "PchUsb2PhySusPgDisable" = "1" - register "speed_shift_enable" = "1" register "s0ix_enable" = "1" register "dptf_enable" = "1" register "power_limits_config" = "{ -- cgit v1.2.3