From 733c462c13ff29eaef1195de5ae61e06211ca719 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Michael=20Niew=C3=B6hner?= <foss@mniewoehner.de>
Date: Sat, 19 Sep 2020 11:49:05 +0200
Subject: soc/intel/cnl: drop lpit.asl in favor of common version
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Drop lpit.asl from CNL and switch to the common one in the three boards
currently using it.

The only difference between the two is the usage on macros in common
code instead of plain integer values.

Change-Id: Iefbd18db7f4c560dce16c4119fde4f4cfbeafb84
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45549
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
---
 src/mainboard/google/drallion/dsdt.asl | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'src/mainboard/google/drallion')

diff --git a/src/mainboard/google/drallion/dsdt.asl b/src/mainboard/google/drallion/dsdt.asl
index ef2a94e1bd..c9f7391977 100644
--- a/src/mainboard/google/drallion/dsdt.asl
+++ b/src/mainboard/google/drallion/dsdt.asl
@@ -40,7 +40,7 @@ DefinitionBlock(
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 
 	/* Low power idle table */
-	#include <soc/intel/cannonlake/acpi/lpit.asl>
+	#include <soc/intel/common/acpi/lpit.asl>
 
 	/* Chrome OS Embedded Controller */
 	Scope (\_SB.PCI0.LPCB)
-- 
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