From e3443d87ccaa3a845b595d3f056317f549ccdf6b Mon Sep 17 00:00:00 2001 From: Thejaswani Putta Date: Thu, 18 Jul 2019 16:23:20 -0700 Subject: mb/google/drallion: Add new mainboard Drallion is a new mainboard using Intel Comet Lake SOC. As a starting point, I took mainboard/sarien as the reference code and modified WHL to Comet Lake. BUG=b:138098572 Test=compiles Signed-off-by: Thejaswani Putta Change-Id: I541952a4ef337e7277a85f02d25979f12ec075c4 Reviewed-on: https://review.coreboot.org/c/coreboot/+/34497 Reviewed-by: Mathew King Tested-by: build bot (Jenkins) --- src/mainboard/google/drallion/board_info.txt | 6 ++++++ 1 file changed, 6 insertions(+) create mode 100644 src/mainboard/google/drallion/board_info.txt (limited to 'src/mainboard/google/drallion/board_info.txt') diff --git a/src/mainboard/google/drallion/board_info.txt b/src/mainboard/google/drallion/board_info.txt new file mode 100644 index 0000000000..dfc194bd0f --- /dev/null +++ b/src/mainboard/google/drallion/board_info.txt @@ -0,0 +1,6 @@ +Vendor name: Google +Board name: Drallion +Category: laptop +ROM protocol: SPI +ROM socketed: n +Flashrom support: y -- cgit v1.2.3