From ca1187faa2a8a0deb7040c05e358442880c027be Mon Sep 17 00:00:00 2001 From: Furquan Shaikh Date: Wed, 23 Oct 2019 11:15:57 -0700 Subject: mb/google/{glados,dragonegg}: Configure GPIOs in mainboard chip->init() mainboard_silicon_init_params() is supposed to be used for only overriding any FSP params as per mainboard configuration. GPIOs should be configured by mainboard as part of its chip init(). This ensures proper ordering w.r.t. any common operations that the SoC code might want to perform e.g. snapshot ITSS polarities. This change moves the configuration of GPIOs from mainboard_silicon_init_params() to mainboard chip->init(). Change-Id: I5d10c01c5b9d5f8ed02274d51dcf9c2a17269685 Signed-off-by: Furquan Shaikh Reviewed-on: https://review.coreboot.org/c/coreboot/+/36270 Reviewed-by: Aaron Durbin Tested-by: build bot (Jenkins) --- src/mainboard/google/dragonegg/Makefile.inc | 1 - src/mainboard/google/dragonegg/mainboard.c | 6 ++++++ src/mainboard/google/dragonegg/ramstage.c | 27 --------------------------- 3 files changed, 6 insertions(+), 28 deletions(-) delete mode 100644 src/mainboard/google/dragonegg/ramstage.c (limited to 'src/mainboard/google/dragonegg') diff --git a/src/mainboard/google/dragonegg/Makefile.inc b/src/mainboard/google/dragonegg/Makefile.inc index dcd8cbccbc..8cb746e0a0 100644 --- a/src/mainboard/google/dragonegg/Makefile.inc +++ b/src/mainboard/google/dragonegg/Makefile.inc @@ -24,7 +24,6 @@ romstage-y += romstage_fsp_params.c ramstage-$(CONFIG_CHROMEOS) += chromeos.c ramstage-$(CONFIG_EC_GOOGLE_CHROMEEC) += ec.c ramstage-y += mainboard.c -ramstage-y += ramstage.c smm-y += smihandler.c diff --git a/src/mainboard/google/dragonegg/mainboard.c b/src/mainboard/google/dragonegg/mainboard.c index c4df94b1f5..df83f38c3e 100644 --- a/src/mainboard/google/dragonegg/mainboard.c +++ b/src/mainboard/google/dragonegg/mainboard.c @@ -23,6 +23,12 @@ static void mainboard_init(void *chip_info) { + size_t num; + const struct pad_config *gpio_table; + + gpio_table = variant_gpio_table(&num); + gpio_configure_pads(gpio_table, num); + mainboard_ec_init(); } diff --git a/src/mainboard/google/dragonegg/ramstage.c b/src/mainboard/google/dragonegg/ramstage.c deleted file mode 100644 index 1719a0720b..0000000000 --- a/src/mainboard/google/dragonegg/ramstage.c +++ /dev/null @@ -1,27 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2018 Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include -#include -#include - -void mainboard_silicon_init_params(FSP_S_CONFIG *params) -{ - size_t num; - const struct pad_config *gpio_table; - - gpio_table = variant_gpio_table(&num); - gpio_configure_pads(gpio_table, num); -} -- cgit v1.2.3