From 74b1919f1779a3a3b1a0320482784bb31234b175 Mon Sep 17 00:00:00 2001 From: Aamir Bohra Date: Thu, 28 May 2020 10:00:16 +0530 Subject: mb/google/dedede: Enable Heci1 device Enable heci1 device from devicetree for PCI enumeration. This is required for ME status dump using HFSTSx resgisters in PCI config space. Heci1 device is later disabled through heci disable flow. TEST=Build, boot waddledoo. ME status dump is seen in console logs. Signed-off-by: Aamir Bohra Change-Id: Icb77db3f0666c2d14ebef2c3214564346d1fd3c9 Reviewed-on: https://review.coreboot.org/c/coreboot/+/41807 Tested-by: build bot (Jenkins) Reviewed-by: Tim Wawrzynczak Reviewed-by: Karthik Ramasubramanian --- src/mainboard/google/dedede/variants/baseboard/devicetree.cb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/mainboard/google/dedede/variants') diff --git a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb index 1b42dfb81a..fc4397689e 100644 --- a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb @@ -258,7 +258,7 @@ chip soc/intel/jasperlake device pci 15.1 on end # I2C 1 device pci 15.2 on end # I2C 2 device pci 15.3 on end # I2C 3 - device pci 16.0 off end # HECI 1 + device pci 16.0 on end # HECI 1 device pci 16.1 off end # HECI 2 device pci 16.4 off end # HECI 3 device pci 16.5 off end # HECI 4 -- cgit v1.2.3