From 48286abfc1299cd2e8a71461caa34b4ea8b8e69c Mon Sep 17 00:00:00 2001
From: Amanda Huang <amanda_hwang@compal.corp-partner.google.com>
Date: Mon, 13 Mar 2023 11:05:29 +0800
Subject: mb/google/dedede/var/dibbi: Configure I2C times for audio

Configure the I2C bus high and low time for audio.

BUG=b:271804915
BRANCH=dedede
TEST=Build and confirm I2C clock for audio is between 380 kHz and 400
kHz

Change-Id: I2987a39abc5527844424edfa1cf70d5c5cea5357
Signed-off-by: Amanda Huang <amanda_hwang@compal.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73701
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Reka Norman <rekanorman@chromium.org>
---
 src/mainboard/google/dedede/variants/dibbi/overridetree.cb | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

(limited to 'src/mainboard/google/dedede/variants')

diff --git a/src/mainboard/google/dedede/variants/dibbi/overridetree.cb b/src/mainboard/google/dedede/variants/dibbi/overridetree.cb
index 8e7a993e0d..e3df1f2d17 100644
--- a/src/mainboard/google/dedede/variants/dibbi/overridetree.cb
+++ b/src/mainboard/google/dedede/variants/dibbi/overridetree.cb
@@ -16,7 +16,12 @@ chip soc/intel/jasperlake
 			.early_init = 1,
 		},
 		.i2c[4] = {
-			.speed = I2C_SPEED_FAST,
+			.speed_config[0] = {
+				.speed = I2C_SPEED_FAST,
+				.scl_lcnt = 190,
+				.scl_hcnt = 100,
+				.sda_hold = 40,
+			}
 		},
 	}"
 
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