From ef29befb09278eb4ed74d97a3808d21d0a691fbb Mon Sep 17 00:00:00 2001 From: Teddy Shih Date: Fri, 24 Jun 2022 12:36:06 +0800 Subject: mb/google/dedede/var/beadrix: Update SoC gpio pin of BC1.2 Update SoC GPIO setting of adding BC1.2 SLGC55545 according to beadrix schematics. GPP_A18 : NC -> NF1 (USB_OC0_N) BUG=b:214393595, b:226294980 BRANCH=None TEST=on beadrix, validated by beadrix's Type A working properly. Signed-off-by: Teddy Shih Change-Id: I746931582cc12f49f7f1c667563350ebac8ddfa1 Reviewed-on: https://review.coreboot.org/c/coreboot/+/65377 Tested-by: build bot (Jenkins) Reviewed-by: Super Ni Reviewed-by: Ivan Chen Reviewed-by: Paul Fagerburg Reviewed-by: Karthik Ramasubramanian --- src/mainboard/google/dedede/variants/beadrix/overridetree.cb | 1 + 1 file changed, 1 insertion(+) (limited to 'src/mainboard/google/dedede/variants/beadrix/overridetree.cb') diff --git a/src/mainboard/google/dedede/variants/beadrix/overridetree.cb b/src/mainboard/google/dedede/variants/beadrix/overridetree.cb index 82677a2956..46a74ce09b 100644 --- a/src/mainboard/google/dedede/variants/beadrix/overridetree.cb +++ b/src/mainboard/google/dedede/variants/beadrix/overridetree.cb @@ -9,6 +9,7 @@ end chip soc/intel/jasperlake # USB Port Configuration + register "usb2_ports[2]" = "USB2_PORT_MID(OC0)" # USB3 Type A port register "usb2_ports[4]" = "USB2_PORT_EMPTY" # Disable unused USB2P_5 and USB2N_5 register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)" # Camera register "usb2_ports[6]" = "USB2_PORT_EMPTY" # Disable unused USB2P_7 and USB2N_7 -- cgit v1.2.3