From cee275fd5c216f56f77c6d52f01fa91c1bfc0447 Mon Sep 17 00:00:00 2001 From: Teddy Shih Date: Wed, 8 Jun 2022 14:02:46 +0800 Subject: mb/google/dedede/beadrix: Update probe daughter LTE mainboard SAR Update FW_CONFIG probe for daughter board LTE and mainboard SAR according to beadrix schematics. BRANCH=dedede BUG=b:226910787, b:213549229, b:233983127 TEST=on beadrix, validated by beadrix LTE working properly. Signed-off-by: Teddy Shih Change-Id: I126a1c548b6314acc0749fcfbdffd8f482c4f46c Reviewed-on: https://review.coreboot.org/c/coreboot/+/65013 Tested-by: build bot (Jenkins) Reviewed-by: Tim Wawrzynczak --- src/mainboard/google/dedede/variants/beadrix/overridetree.cb | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'src/mainboard/google/dedede/variants/beadrix/overridetree.cb') diff --git a/src/mainboard/google/dedede/variants/beadrix/overridetree.cb b/src/mainboard/google/dedede/variants/beadrix/overridetree.cb index 909558323e..82677a2956 100644 --- a/src/mainboard/google/dedede/variants/beadrix/overridetree.cb +++ b/src/mainboard/google/dedede/variants/beadrix/overridetree.cb @@ -121,7 +121,7 @@ chip soc/intel/jasperlake register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A10)" register "enable_delay_ms" = "20" device usb 3.3 on - probe LTE LTE_PRESENT + probe DB_PORTS DB_PORTS_1C_LTE end end end @@ -218,7 +218,9 @@ chip soc/intel/jasperlake register "reg_irq_cfg0" = "0x00" register "reg_irq_cfg1" = "0x80" register "reg_irq_cfg2" = "0x00" - device i2c 28 on end + device i2c 28 on + probe DB_PORTS DB_PORTS_1C_LTE + end end end # I2C 5 device pci 1f.3 on -- cgit v1.2.3