From a5a862b39784a41c61965e0579ec8dedba7ebe32 Mon Sep 17 00:00:00 2001 From: MAULIK V VAGHELA Date: Mon, 2 Aug 2021 17:23:55 +0530 Subject: mb/*/jslrvp/dedede: Remove hardcoding of BSP APIC ID MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit coreboot always assumes that BSP APIC ID will be 0 and core enumeration logic will look for lapic id from the mainboard. As per Intel 64 and IA-32 Architectures Software Developer’s Manual Volume 3: 8.4.1 BSP and AP Processors, this assumption might not hold true and we may have any other core as BSP. To handle this, we need to remove hardcoding of APIC ID 0 from mainboard. BUG=None BRANCH=None TEST=Check if there is no functional impact on the board. Change-Id: I726d70b4ffc35a28a654abbd20c866f1410e1aee Signed-off-by: MAULIK V VAGHELA Reviewed-on: https://review.coreboot.org/c/coreboot/+/56759 Tested-by: build bot (Jenkins) Reviewed-by: Subrata Banik Reviewed-by: Tim Wawrzynczak Reviewed-by: Karthik Ramasubramanian --- src/mainboard/google/dedede/variants/baseboard/devicetree.cb | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) (limited to 'src/mainboard/google/dedede/variants/baseboard') diff --git a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb index cb5321c773..38b1da2712 100644 --- a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb @@ -27,9 +27,7 @@ fw_config end chip soc/intel/jasperlake - device cpu_cluster 0 on - device lapic 0 on end - end + device cpu_cluster 0 on end # GPE configuration # Note that GPE events called out in ASL code rely on this -- cgit v1.2.3