From b61ed3550beb662b2a28e966878c4e717062e8f9 Mon Sep 17 00:00:00 2001 From: Hannah Williams Date: Sat, 18 Jul 2015 16:04:21 -0700 Subject: google/cyan: Configure EC_IN_RW signal as gpio input BUG=chrome-os-partner:42881 BRANCH=None TEST=Using ctrl-d in recovery mode to switch to dev mode works. Change-Id: Iefbd11d435c4beb570875d4835a085b194d1d1e8 Signed-off-by: Patrick Georgi Original-Commit-Id: be172409792a224855b1d31621f23d1969d319b9 Original-Signed-off-by: Hannah Williams Original-Change-Id: Icf57dfc4cc258aa2cba341f40d285f8c843aace5 Original-Reviewed-on: https://chromium-review.googlesource.com/286612 Original-Commit-Queue: Hannah Williams Original-Tested-by: Hannah Williams Original-Reviewed-by: Shawn N Reviewed-on: http://review.coreboot.org/11013 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer --- src/mainboard/google/cyan/gpio.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/mainboard/google/cyan') diff --git a/src/mainboard/google/cyan/gpio.c b/src/mainboard/google/cyan/gpio.c index 3cd319d369..3030477299 100644 --- a/src/mainboard/google/cyan/gpio.c +++ b/src/mainboard/google/cyan/gpio.c @@ -131,7 +131,7 @@ static const struct soc_gpio_map gpsw_gpio_map[] = { GPIO_INPUT_NO_PULL,/* 67 I2C3_SCL,RAMID1 */ GPIO_OUT_HIGH, /* 75 SATA_GP0 */ GPIO_NC, /* 76 GPI SATA_GP1 */ - Native_M1, /* 77 SATA_LEDN */ + GPIO_INPUT_PU_20K, /* 77 SATA_LEDN, EC_IN_RW */ GPIO_NC, /* 78 HSIC AUX1 / SV Mode/ SATA_GP2 */ Native_M1, /* 79 MF_SMB_ALERTB */ GPIO_INPUT_NO_PULL, /* 80 SATA_GP3,RAMID0 */ -- cgit v1.2.3