From 158170b0a8128780df7dded2e24be067133c8a7d Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Wed, 1 Nov 2017 00:20:16 -0500 Subject: google/reks: override RX ODT limit, RAM geometry if needed Adapted from Chromium commit 6ee6f3d: Reks: To set the RX ODT limit... Override RX ODT and DRAM geometry for Micron part MT52L256M32D1PF-107. Use get_ramid() to determine if override is necessary. Original-Change-Id: I41f3aba030a00152e1217533ef953338ac396605 Original-Signed-off-by: Kevin Chiu Original-Reviewed-by: Kane Chen Original-Reviewed-by: Aaron Durbin Original-Tested-by: Keith Tzeng Change-Id: Iea8c3c67e5afb21285dc15ad665474ad5f192423 Signed-off-by: Matt DeVillier Reviewed-on: https://review.coreboot.org/22268 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- .../google/cyan/variants/reks/Makefile.inc | 1 + src/mainboard/google/cyan/variants/reks/romstage.c | 47 ++++++++++++++++++++++ 2 files changed, 48 insertions(+) create mode 100644 src/mainboard/google/cyan/variants/reks/romstage.c (limited to 'src/mainboard/google/cyan/variants') diff --git a/src/mainboard/google/cyan/variants/reks/Makefile.inc b/src/mainboard/google/cyan/variants/reks/Makefile.inc index 65771247b9..db2eea3d29 100644 --- a/src/mainboard/google/cyan/variants/reks/Makefile.inc +++ b/src/mainboard/google/cyan/variants/reks/Makefile.inc @@ -14,6 +14,7 @@ ## GNU General Public License for more details. ## +romstage-y += romstage.c romstage-y += spd_util.c ramstage-y += gpio.c diff --git a/src/mainboard/google/cyan/variants/reks/romstage.c b/src/mainboard/google/cyan/variants/reks/romstage.c new file mode 100644 index 0000000000..5414cbd7d5 --- /dev/null +++ b/src/mainboard/google/cyan/variants/reks/romstage.c @@ -0,0 +1,47 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2013 Google Inc. + * Copyright (C) 2015 Intel Corp. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include + +void variant_memory_init_params(MEMORY_INIT_UPD *memory_params) +{ + int ram_id = get_ramid(); + + /* + * RAMID = A - 4GiB Micron MT52L256M32D1PF-107 + * RAMID = 2 - 2GiB Micron MT52L256M32D1PF-107 + */ + if (ram_id == 2 || ram_id == 0xA) { + + /* + * For new micron part, it requires read/receive + * enable training before sending cmds to get MR8. + * To override dram geometry settings as below: + * + * PcdDramWidth = x32 + * PcdDramDensity = 8Gb + * PcdDualRankDram = disable + */ + memory_params->PcdRxOdtLimitChannel0 = 1; + memory_params->PcdRxOdtLimitChannel1 = 1; + memory_params->PcdDisableAutoDetectDram = 1; + memory_params->PcdDramWidth = 2; + memory_params->PcdDramDensity = 3; + memory_params->PcdDualRankDram = 0; + } +} -- cgit v1.2.3