From 81b5bde7e481ab664d581d9c2b17e5b22ac28302 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Tue, 29 Aug 2017 01:09:07 -0500 Subject: google/setzer: add new board as variant of cyan baseboard Add support for google/setzer (HP Chromebook 11 G5) as a variant of the cyan Braswell baseboard. - Add board-specific code as the new setzer variant - Add new I2C touchscreen device and SPD files to the baseboard for potential reuse by other variants Sourced from Chromium branch firmware-strago-7287.B, commit 02dc8db: Banon: 2nd source DDR memory (Micro-MT52L256M32D1PF) Change-Id: Ibcebebeb469c4bd6139b8ce83a1ca5ca560c2252 Signed-off-by: Matt DeVillier Reviewed-on: https://review.coreboot.org/21575 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth --- .../google/cyan/variants/setzer/spd_util.c | 92 ++++++++++++++++++++++ 1 file changed, 92 insertions(+) create mode 100644 src/mainboard/google/cyan/variants/setzer/spd_util.c (limited to 'src/mainboard/google/cyan/variants/setzer/spd_util.c') diff --git a/src/mainboard/google/cyan/variants/setzer/spd_util.c b/src/mainboard/google/cyan/variants/setzer/spd_util.c new file mode 100644 index 0000000000..cd1a2e35d0 --- /dev/null +++ b/src/mainboard/google/cyan/variants/setzer/spd_util.c @@ -0,0 +1,92 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2013 Google Inc. + * Copyright (C) 2015 Intel Corp. + * Copyright (C) 2017 Matt DeVillier + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include + +/* + * 0b0000 - 4GiB total - 2 x 2GiB Samsung K4E8E304EE-EGCF + * 0b0001 - 2GiB total - 1 x 2GiB Samsung K4E8E304EE-EGCF + * 0b0010 - 4GiB total - 2 x 2GiB Hynix H9CCNNN8GTMLAR-NUD + * 0b0011 - 2GiB total - 1 x 2GiB Hynix H9CCNNN8GTMLAR-NUD + * 0b0100 - 4GiB total - 2 x 2GiB Micron MT52L256M32D1PF-107 + * 0b0101 - 2GiB total - 1 x 2GiB Micron MT52L256M32D1PF-107 + * 0b0110 - 2GiB total - 1 x 2GiB Samsung K4E8E324EB-EGCF + * 0b0111 - 4GiB total - 2 x 2GiB Samsung K4E8E324EB-EGCF + * 0b1000 - 2GiB total - 1 x 2GiB Hynix H9CCNNN8GTALAR-NUD + * 0b1001 - 4GiB total - 2 x 4GiB Hynix H9CCNNN8GTALAR-NUD + */ + +static const uint32_t dual_channel_config = + (1 << 0) | (1 << 2) | (1 << 4) | (1 << 7) | (1 << 9); + +uint8_t get_ramid(void) +{ + gpio_t spd_gpios[] = { + GP_SW_64, /* I2C3_SDA, RAMID0 */ + GP_SE_02, /* MF_PLT_CLK1, RAMID1 */ + GP_SW_67, /* I2C3_SCL, RAMID2 */ + GP_SW_80, /* SATA_GP3, RAMID3 */ + }; + + return gpio_base2_value(spd_gpios, ARRAY_SIZE(spd_gpios)); +} + +int get_variant_spd_index(int ram_id, int *dual) +{ + /* Determine if single or dual channel memory system */ + *dual = (dual_channel_config & (1 << ram_id)) ? 1 : 0; + + /* Display the RAM type */ + switch (ram_id) { + case 0: + printk(BIOS_DEBUG, "4GiB Samsung K4E8E304EE-EGCF\n"); + break; + case 1: + printk(BIOS_DEBUG, "2GiB Samsung K4E8E304EE-EGCF\n"); + break; + case 2: + printk(BIOS_DEBUG, "4GiB Hynix H9CCNNN8GTMLAR-NUD\n"); + break; + case 3: + printk(BIOS_DEBUG, "2GiB Hynix H9CCNNN8GTMLAR-NUD\n"); + break; + case 4: + printk(BIOS_DEBUG, "4GiB Micron MT52L256M32D1PF-107\n"); + break; + case 5: + printk(BIOS_DEBUG, "2GiB Micron MT52L256M32D1PF-107\n"); + break; + case 6: + printk(BIOS_DEBUG, "2GiB Samsung K4E8E324EB-EGCF\n"); + break; + case 7: + printk(BIOS_DEBUG, "4GiB Samsung K4E8E324EB-EGCF\n"); + break; + case 8: + printk(BIOS_DEBUG, "2GiB Hynix H9CCNNN8GTALAR-NUD\n"); + break; + case 9: + printk(BIOS_DEBUG, "4GiB Hynix H9CCNNN8GTALAR-NUD\n"); + break; + } + + /* 1:1 mapping between ram_id and spd_index for setzer */ + return ram_id; +} -- cgit v1.2.3