From 9ace946c2330479fd5fbf33ab4e22a5a4c7687f8 Mon Sep 17 00:00:00 2001
From: Ian Feng <ian_feng@compal.corp-partner.google.com>
Date: Mon, 3 Oct 2022 12:28:31 +0800
Subject: mb/google/nissa/var/xivu: Config I2C frequency
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

1.Change the TPM I2C freqeuncy to 1 MHz for xivu.
2.Config same settings as the baseboard for I2C buses 1-5.

BUG=b:249953477
TEST=On xivu, all timing requirements in the spec are met.
Frequencies:
1. I2C0 (TPM): 974.3 Khz
2. I2C1 (TouchScreen); 375.5 Khz
3. I2C3 （Audio): 389.0 Khz
4. I2C5 (Touchpad): 388.5 Khz

Signed-off-by: Ian Feng <ian_feng@compal.corp-partner.google.com>
Change-Id: I33f712c14978b95f3a4da82d6f1f5fbae1283b17
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68071
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Reka Norman <rekanorman@chromium.org>
Reviewed-by: Frank Wu <frank_wu@compal.corp-partner.google.com>
---
 .../google/brya/variants/xivu/overridetree.cb      | 49 ++++++++++++++++++++++
 1 file changed, 49 insertions(+)

(limited to 'src/mainboard/google/brya')

diff --git a/src/mainboard/google/brya/variants/xivu/overridetree.cb b/src/mainboard/google/brya/variants/xivu/overridetree.cb
index f919cef49a..fa3d22aca8 100644
--- a/src/mainboard/google/brya/variants/xivu/overridetree.cb
+++ b/src/mainboard/google/brya/variants/xivu/overridetree.cb
@@ -41,6 +41,55 @@ chip soc/intel/alderlake
 	#| I2C3              | Audio                     |
 	#| I2C5              | Trackpad                  |
 	#+-------------------+---------------------------+
+	register "common_soc_config" = "{
+		.i2c[0] = {
+			.early_init = 1,
+			.speed = I2C_SPEED_FAST_PLUS,
+			.speed_config[0] = {
+				.speed = I2C_SPEED_FAST_PLUS,
+				.scl_lcnt = 55,
+				.scl_hcnt = 30,
+				.sda_hold = 7,
+			}
+		},
+		.i2c[1] = {
+			.speed = I2C_SPEED_FAST,
+			.speed_config[0] = {
+				.speed = I2C_SPEED_FAST,
+				.scl_lcnt = 158,
+				.scl_hcnt = 79,
+				.sda_hold = 7,
+			}
+		},
+		.i2c[2] = {
+			.speed = I2C_SPEED_FAST,
+			.speed_config[0] = {
+				.speed = I2C_SPEED_FAST,
+				.scl_lcnt = 158,
+				.scl_hcnt = 79,
+				.sda_hold = 7,
+			}
+		},
+		.i2c[3] = {
+			.speed = I2C_SPEED_FAST,
+			.speed_config[0] = {
+				.speed = I2C_SPEED_FAST,
+				.scl_lcnt = 158,
+				.scl_hcnt = 79,
+				.sda_hold = 7,
+			}
+		},
+		.i2c[5] = {
+			.speed = I2C_SPEED_FAST,
+			.speed_config[0] = {
+				.speed = I2C_SPEED_FAST,
+				.scl_lcnt = 158,
+				.scl_hcnt = 79,
+				.sda_hold = 7,
+			}
+		},
+	}"
+
         device domain 0 on
         	device ref dtt on
 			chip drivers/intel/dptf
-- 
cgit v1.2.3