From 55c1e7f858edb939555fbf02223de3e7d020a2a6 Mon Sep 17 00:00:00 2001 From: Casper Chang Date: Wed, 18 May 2022 19:06:09 +0800 Subject: mb/google/brya: Disable PCH USB2 phy power gating for primus The patch disables PCH USB2 Phy power gating to prevent possible display flicker issue for primus board. Please refer Intel doc#723158 for more information. BUG=b:221461379 TEST=Verify the build for primus board Signed-off-by: Casper Chang Change-Id: I4d7d52bdeafe8b1b55822b5c8d040c94ce1f3878 Reviewed-on: https://review.coreboot.org/c/coreboot/+/64463 Tested-by: build bot (Jenkins) Reviewed-by: Tim Wawrzynczak --- src/mainboard/google/brya/variants/primus/overridetree.cb | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'src/mainboard/google/brya/variants') diff --git a/src/mainboard/google/brya/variants/primus/overridetree.cb b/src/mainboard/google/brya/variants/primus/overridetree.cb index 80a456b32c..48f8adca4b 100644 --- a/src/mainboard/google/brya/variants/primus/overridetree.cb +++ b/src/mainboard/google/brya/variants/primus/overridetree.cb @@ -26,6 +26,10 @@ chip soc/intel/alderlake register "sagv" = "SaGv_Enabled" register "max_dram_speed_mts" = "3733" + # As per Intel Advisory doc#723158, the change is required to prevent possible + # display flickering issue. + register "usb2_phy_sus_pg_disable" = "1" + # Acoustic settings register "acoustic_noise_mitigation" = "1" register "slow_slew_rate[VR_DOMAIN_IA]" = "SLEW_FAST_8" -- cgit v1.2.3