From ccfbfdf0bbd642617e6a33779846cbff585516c7 Mon Sep 17 00:00:00 2001 From: Joey Peng Date: Tue, 21 Jun 2022 15:43:36 +0800 Subject: mb/google/brya/var/taniks: Modify DPTF setting for taniks Adjust sensor trigger point and fan duty according to thermal team tuning results. BRANCH=brya BUG=b:215033682 TEST=Built and tested on taniks board Signed-off-by: Joey Peng Change-Id: I8135684d471fdcfdbbe2f1bc5455902d56bb71de Reviewed-on: https://review.coreboot.org/c/coreboot/+/65287 Tested-by: build bot (Jenkins) Reviewed-by: Tim Wawrzynczak --- .../google/brya/variants/taniks/overridetree.cb | 54 +++++++++++----------- 1 file changed, 27 insertions(+), 27 deletions(-) (limited to 'src/mainboard/google/brya/variants/taniks') diff --git a/src/mainboard/google/brya/variants/taniks/overridetree.cb b/src/mainboard/google/brya/variants/taniks/overridetree.cb index 9a52753cdc..fe37f68af8 100644 --- a/src/mainboard/google/brya/variants/taniks/overridetree.cb +++ b/src/mainboard/google/brya/variants/taniks/overridetree.cb @@ -124,41 +124,41 @@ chip soc/intel/alderlake [0] = { .target = DPTF_CPU, .thresholds = { - TEMP_PCT(85, 90), - TEMP_PCT(80, 74), - TEMP_PCT(75, 74), - TEMP_PCT(70, 74), - TEMP_PCT(65, 74), + TEMP_PCT(60, 68), + TEMP_PCT(56, 50), + TEMP_PCT(52, 50), + TEMP_PCT(46, 40), + TEMP_PCT(42, 40), } }, [1] = { .target = DPTF_TEMP_SENSOR_1, .thresholds = { - TEMP_PCT(57, 70), - TEMP_PCT(54, 60), - TEMP_PCT(48, 60), - TEMP_PCT(45, 45), - TEMP_PCT(42, 39), + TEMP_PCT(60, 68), + TEMP_PCT(56, 50), + TEMP_PCT(52, 50), + TEMP_PCT(46, 40), + TEMP_PCT(42, 40), } }, [2] = { .target = DPTF_TEMP_SENSOR_2, .thresholds = { - TEMP_PCT(57, 70), - TEMP_PCT(54, 60), - TEMP_PCT(48, 60), - TEMP_PCT(45, 45), - TEMP_PCT(42, 39), + TEMP_PCT(60, 68), + TEMP_PCT(56, 50), + TEMP_PCT(52, 50), + TEMP_PCT(46, 40), + TEMP_PCT(42, 40), } }, [3] = { .target = DPTF_TEMP_SENSOR_3, .thresholds = { - TEMP_PCT(57, 70), - TEMP_PCT(54, 60), - TEMP_PCT(48, 60), - TEMP_PCT(45, 45), - TEMP_PCT(42, 39), + TEMP_PCT(60, 69), + TEMP_PCT(56, 50), + TEMP_PCT(52, 50), + TEMP_PCT(46, 40), + TEMP_PCT(42, 40), } } }" @@ -210,13 +210,13 @@ chip soc/intel/alderlake register "controls.fan_perf" = "{ [0] = { 100, 6000, 220, 2200, }, [1] = { 92, 5500, 180, 1800, }, - [2] = { 85, 5000, 145, 1450, }, - [3] = { 70, 4400, 115, 1150, }, - [4] = { 60, 3900, 90, 900, }, - [5] = { 45, 3300, 55, 550, }, - [6] = { 39, 3000, 30, 300, }, - [7] = { 33, 2900, 15, 150, }, - [8] = { 10, 800, 10, 100, }, + [2] = { 78, 4500, 145, 1450, }, + [3] = { 68, 3900, 115, 1150, }, + [4] = { 60, 3600, 90, 900, }, + [5] = { 50, 3200, 55, 550, }, + [6] = { 40, 2800, 30, 300, }, + [7] = { 33, 2500, 15, 150, }, + [8] = { 12, 800, 10, 100, }, [9] = { 0, 0, 0, 50, } }" -- cgit v1.2.3