From ad6b27e9efa84d121b1d55db44fd35a8a52635cc Mon Sep 17 00:00:00 2001 From: Joey Peng Date: Wed, 10 Aug 2022 09:04:26 +0800 Subject: mb/google/brya/var/taeko: Disable PCH USB2 phy power gating for taeko The patch disables PCH USB2 Phy power gating to prevent possible display flicker issue for taeko board. Please refer Intel doc#723158 for more information. BUG=b:241965786 TEST=Verify on taeko/tarlo boards. Signed-off-by: Joey Peng Change-Id: I03042906d5bea9b9010016adb98fbe68e2dc92f7 Reviewed-on: https://review.coreboot.org/c/coreboot/+/66582 Tested-by: build bot (Jenkins) Reviewed-by: Tim Wawrzynczak --- src/mainboard/google/brya/variants/taeko/overridetree.cb | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'src/mainboard/google/brya/variants/taeko') diff --git a/src/mainboard/google/brya/variants/taeko/overridetree.cb b/src/mainboard/google/brya/variants/taeko/overridetree.cb index 9a4de9393c..30aa355866 100644 --- a/src/mainboard/google/brya/variants/taeko/overridetree.cb +++ b/src/mainboard/google/brya/variants/taeko/overridetree.cb @@ -44,6 +44,10 @@ fw_config end end chip soc/intel/alderlake + # As per Intel Advisory doc#723158, the change is required to prevent possible + # display flickering issue. + register "usb2_phy_sus_pg_disable" = "1" + # Acoustic settings register "acoustic_noise_mitigation" = "1" register "slow_slew_rate[VR_DOMAIN_IA]" = "SLEW_FAST_8" -- cgit v1.2.3