From 054620dcdc4d9bda47b245ad58d2c6c5f8f79e86 Mon Sep 17 00:00:00 2001 From: Reka Norman Date: Tue, 16 Aug 2022 10:48:51 +1000 Subject: mb/google/nissa: Simplify LTE GPIO config using pad-based overrides Currently, to enable/disable LTE based on fw_config on nissa, we have two sets of GPIOs: lte_enable_pads and lte_disable_pads. This was to prevent the SAR interrupt pin GPP_H19 from floating for the short period of time between enabling it in gpio.c and disabling it in fw_config.c (see CB:64270 for more details). With the new pad-based GPIO overrides (CB:64712), this is no longer an issue since the gpio.c and fw_config.c overrides are applied at the same time. So simplify the LTE GPIO configuration by enabling all the LTE pins in the variant gpio.c, then disabling them in fw_config.c if needed. BUG=b:231690996 TEST=LTE still works on nivviks Change-Id: I5bf20a027414ea5e7c1f198d69e355c76f467244 Signed-off-by: Reka Norman Reviewed-on: https://review.coreboot.org/c/coreboot/+/66776 Reviewed-by: Kangheui Won Reviewed-by: Eric Lai Tested-by: build bot (Jenkins) --- .../google/brya/variants/pujjo/fw_config.c | 21 +++++++-------------- src/mainboard/google/brya/variants/pujjo/gpio.c | 6 ++++++ 2 files changed, 13 insertions(+), 14 deletions(-) (limited to 'src/mainboard/google/brya/variants/pujjo') diff --git a/src/mainboard/google/brya/variants/pujjo/fw_config.c b/src/mainboard/google/brya/variants/pujjo/fw_config.c index 625cd97cd3..ee86e7485b 100644 --- a/src/mainboard/google/brya/variants/pujjo/fw_config.c +++ b/src/mainboard/google/brya/variants/pujjo/fw_config.c @@ -5,20 +5,17 @@ #include #include -static const struct pad_config lte_enable_pads[] = { - /* A8 : WWAN_RF_DISABLE_ODL */ - PAD_CFG_GPO(GPP_A8, 1, DEEP), - /* H19 : SOC_I2C_SUB_INT_ODL */ - PAD_CFG_GPI_APIC(GPP_H19, NONE, PLTRST, LEVEL, NONE), - /* H23 : WWAN_SAR_DETECT_ODL */ - PAD_CFG_GPO(GPP_H23, 1, DEEP), -}; - static const struct pad_config lte_disable_pads[] = { + /* A8 : WWAN_RF_DISABLE_ODL */ + PAD_NC(GPP_A8, NONE), /* D6 : WWAN_EN */ PAD_NC(GPP_D6, NONE), /* F12 : WWAN_RST_L */ PAD_NC_LOCK(GPP_F12, NONE, LOCK_CONFIG), + /* H19 : SOC_I2C_SUB_INT_ODL */ + PAD_NC(GPP_H19, NONE), + /* H23 : WWAN_SAR_DETECT_ODL */ + PAD_NC(GPP_H23, NONE), }; static const struct pad_config sd_disable_pads[] = { @@ -32,11 +29,7 @@ static const struct pad_config sd_disable_pads[] = { void fw_config_gpio_padbased_override(struct pad_config *padbased_table) { - if (fw_config_probe(FW_CONFIG(LTE, LTE_PRESENT))) { - printk(BIOS_INFO, "Enable LTE-related GPIO pins.\n"); - gpio_padbased_override(padbased_table, lte_enable_pads, - ARRAY_SIZE(lte_enable_pads)); - } else { + if (!fw_config_probe(FW_CONFIG(LTE, LTE_PRESENT))) { printk(BIOS_INFO, "Disable LTE-related GPIO pins.\n"); gpio_padbased_override(padbased_table, lte_disable_pads, ARRAY_SIZE(lte_disable_pads)); diff --git a/src/mainboard/google/brya/variants/pujjo/gpio.c b/src/mainboard/google/brya/variants/pujjo/gpio.c index 46d4a1a6dc..d73a9c8d31 100644 --- a/src/mainboard/google/brya/variants/pujjo/gpio.c +++ b/src/mainboard/google/brya/variants/pujjo/gpio.c @@ -7,6 +7,8 @@ /* Pad configuration in ramstage for Pujjo */ static const struct pad_config override_gpio_table[] = { + /* A8 : WWAN_RF_DISABLE_ODL */ + PAD_CFG_GPO(GPP_A8, 1, DEEP), /* D3 : WCAM_RST_L ==> NC */ PAD_NC_LOCK(GPP_D3, NONE, LOCK_CONFIG), /* D6 : SRCCLKREQ1# ==> WWAN_EN */ @@ -17,8 +19,12 @@ static const struct pad_config override_gpio_table[] = { PAD_NC_LOCK(GPP_D16, NONE, LOCK_CONFIG), /* F12 : WWAN_RST_L */ PAD_CFG_GPO_LOCK(GPP_F12, 1, LOCK_CONFIG), + /* H19 : SOC_I2C_SUB_INT_ODL */ + PAD_CFG_GPI_APIC(GPP_H19, NONE, PLTRST, LEVEL, NONE), /* H22 : WCAM_MCLK_R ==> NC */ PAD_NC(GPP_H22, NONE), + /* H23 : WWAN_SAR_DETECT_ODL */ + PAD_CFG_GPO(GPP_H23, 1, DEEP), }; /* Early pad configuration in bootblock */ -- cgit v1.2.3