From 69c9b01efafbfb1f320f074e3e450d1c175bf03b Mon Sep 17 00:00:00 2001 From: Reka Norman Date: Fri, 3 Jun 2022 16:31:09 +1000 Subject: mb/google/nissa: Increase I2C bus frequency to around 390 kHz - Set the speed to I2C_SPEED_FAST in each speed_config so that the speed_config is actually applied. Currently, the speed_config isn't applied, so the hcnt/lcnt calculation falls back to rise_time_ns and fall_time_ns, which are 0 since they're not set. This results in frequencies around 300 kHz. - Move the data hold time to the speed_config, ensuring that the resulting sda_hold value remains the same. - For nivviks and nereid, tune scl_lcnt and scl_hcnt for each bus to give a frequency around 390 kHz. - In the baseboard, keep default scl_lcnt and scl_hcnt values. These work well for buses with a rise time around 100 ns, and can be used as a starting point before tuning them for a specific variant. BUG=b:229547183 TEST=Measure the clock frequency, tHIGH, tLOW and tVD;DAT on nivviks and nereid and check they meet the spec. nereid clock frequencies: I2C0 - 387.9 kHz I2C1 - 392.7 kHz I2C3 - 386.3 kHz I2C5 - 383.6 kHz nivviks clock frequencies: I2C0 - 387.67 kHz I2C1 - 380.47 kHz I2C2 - 388.51 kHz I2C3 - 384.03 kHz I2C5 - 389.09 kHz Change-Id: I88a6cfcc893183385eb85a89489e5d270277e537 Signed-off-by: Reka Norman Reviewed-on: https://review.coreboot.org/c/coreboot/+/64942 Reviewed-by: Kangheui Won Tested-by: build bot (Jenkins) --- .../google/brya/variants/nivviks/overridetree.cb | 61 ++++++++++++++++++++++ 1 file changed, 61 insertions(+) (limited to 'src/mainboard/google/brya/variants/nivviks') diff --git a/src/mainboard/google/brya/variants/nivviks/overridetree.cb b/src/mainboard/google/brya/variants/nivviks/overridetree.cb index 34b142a0eb..267cf45c20 100644 --- a/src/mainboard/google/brya/variants/nivviks/overridetree.cb +++ b/src/mainboard/google/brya/variants/nivviks/overridetree.cb @@ -50,6 +50,67 @@ chip soc/intel/alderlake .vnn_icc_max_ma = 500, }" + # Intel Common SoC Config + #+-------------------+---------------------------+ + #| Field | Value | + #+-------------------+---------------------------+ + #| I2C0 | TPM. Early init is | + #| | required to set up a BAR | + #| | for TPM communication | + #| I2C1 | Touchscreen | + #| I2C2 | Sub-board(PSensor)/WCAM | + #| I2C3 | Audio | + #| I2C5 | Trackpad | + #+-------------------+---------------------------+ + register "common_soc_config" = "{ + .i2c[0] = { + .early_init = 1, + .speed = I2C_SPEED_FAST, + .speed_config[0] = { + .speed = I2C_SPEED_FAST, + .scl_lcnt = 160, + .scl_hcnt = 79, + .sda_hold = 7, + } + }, + .i2c[1] = { + .speed = I2C_SPEED_FAST, + .speed_config[0] = { + .speed = I2C_SPEED_FAST, + .scl_lcnt = 157, + .scl_hcnt = 79, + .sda_hold = 7, + } + }, + .i2c[2] = { + .speed = I2C_SPEED_FAST, + .speed_config[0] = { + .speed = I2C_SPEED_FAST, + .scl_lcnt = 157, + .scl_hcnt = 79, + .sda_hold = 7, + } + }, + .i2c[3] = { + .speed = I2C_SPEED_FAST, + .speed_config[0] = { + .speed = I2C_SPEED_FAST, + .scl_lcnt = 158, + .scl_hcnt = 79, + .sda_hold = 7, + } + }, + .i2c[5] = { + .speed = I2C_SPEED_FAST, + .speed_config[0] = { + .speed = I2C_SPEED_FAST, + .scl_lcnt = 158, + .scl_hcnt = 79, + .sda_hold = 7, + } + }, + }" + device domain 0 on device ref dtt on chip drivers/intel/dptf -- cgit v1.2.3