From ff424fbe6be2e01fa6a8f50764d97458e1eba691 Mon Sep 17 00:00:00 2001 From: Eric Lai Date: Thu, 28 Jul 2022 14:05:03 +0800 Subject: mb/google/brya/var/ghost: Enable CS42L42 codec Add CS42L42 support in device tree. BUG=b:240006200 BRANCH=firmware-brya-14505.B TEST=Check cs42l42 driver can probe successfully in kernel. cs42l42 i2c-10134242:00: Cirrus Logic CS42L42, Revision: B1 Signed-off-by: Eric Lai Change-Id: I861f47c12f4cebb016a4cfbe225f97d34d55e233 Reviewed-on: https://review.coreboot.org/c/coreboot/+/66223 Tested-by: build bot (Jenkins) Reviewed-by: Caveh Jalali --- src/mainboard/google/brya/variants/ghost/gpio.c | 4 ++-- .../google/brya/variants/ghost/overridetree.cb | 18 ++++++++++++++++++ 2 files changed, 20 insertions(+), 2 deletions(-) (limited to 'src/mainboard/google/brya/variants/ghost') diff --git a/src/mainboard/google/brya/variants/ghost/gpio.c b/src/mainboard/google/brya/variants/ghost/gpio.c index 96a270d893..a26cc72dea 100644 --- a/src/mainboard/google/brya/variants/ghost/gpio.c +++ b/src/mainboard/google/brya/variants/ghost/gpio.c @@ -45,8 +45,8 @@ static const struct pad_config gpio_table[] = { /* GPP_A6 : GPP_A6 ==> ESPI_ALERT1 configured on reset, do not touch */ /* GPP_A7 : No heuristic was found useful */ PAD_NC(GPP_A7, NONE), - /* GPP_A8 : No heuristic was found useful */ - PAD_NC(GPP_A8, NONE), + /* GPP_A8 : HP_RST_ODL */ + PAD_CFG_GPO(GPP_A8, 1, PLTRST), /* GPP_A9 : GPP_A9 ==> ESPI_PCH_CLK_R configured on reset, do not touch */ /* GPP_A10 : GPP_A10 ==> ESPI_PCH_RST_EC_L configured on reset, do not touch */ /* GPP_A11 : [NF6: USB_C_GPP_A11] ==> EN_SPKR_PA */ diff --git a/src/mainboard/google/brya/variants/ghost/overridetree.cb b/src/mainboard/google/brya/variants/ghost/overridetree.cb index d275553d0b..3d401e1796 100644 --- a/src/mainboard/google/brya/variants/ghost/overridetree.cb +++ b/src/mainboard/google/brya/variants/ghost/overridetree.cb @@ -82,6 +82,24 @@ chip soc/intel/alderlake device generic 0 on end end end + device ref i2c0 on + chip drivers/i2c/cs42l42 + register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_A23)" + register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A8)" + register "ts_inv" = "true" + register "ts_dbnc_rise" = "RISE_DEB_1000_MS" + register "ts_dbnc_fall" = "FALL_DEB_0_MS" + register "btn_det_init_dbnce" = "100" + register "btn_det_event_dbnce" = "10" + register "bias_lvls[0]" = "15" + register "bias_lvls[1]" = "8" + register "bias_lvls[2]" = "4" + register "bias_lvls[3]" = "1" + register "hs_bias_ramp_rate" = "HSBIAS_RAMP_SLOW" + register "hs_bias_sense_disable" = "true" + device i2c 48 on end + end + end device ref i2c1 on chip drivers/i2c/tpm register "hid" = ""GOOG0005"" -- cgit v1.2.3