From 7fd0c59969fa3d6ea54b761b9bd4996c40f94a0e Mon Sep 17 00:00:00 2001 From: Tyler Wang Date: Tue, 11 Apr 2023 11:19:38 +0800 Subject: mb/google/nissa/var/craask: Add GTCH7503 and split TS by SSFC Add G2 touchscreen GTCH7503 for craaskino. Use SSFC to separate touchscreen settings. Bit 38-41 for TS_SOURCE: (1) TS_UNPROVISIONED --> 0 (2) TS_GTCH7503 --> 1 BUG=b:277979947 TEST=(1) emerge-nissa coreboot (2) Test on craaskino with G2 touchscreen (3) Test on craaskino with elan touchscreen Signed-off-by: Tyler Wang Change-Id: I636f21be39f26a617653e134129a11479e801ea2 Reviewed-on: https://review.coreboot.org/c/coreboot/+/74298 Tested-by: build bot (Jenkins) Reviewed-by: Eric Lai Reviewed-by: Derek Huang --- .../google/brya/variants/craask/overridetree.cb | 28 ++++++++++++++++++++-- 1 file changed, 26 insertions(+), 2 deletions(-) (limited to 'src/mainboard/google/brya/variants/craask/overridetree.cb') diff --git a/src/mainboard/google/brya/variants/craask/overridetree.cb b/src/mainboard/google/brya/variants/craask/overridetree.cb index 5f12558c3f..e65ac805f8 100644 --- a/src/mainboard/google/brya/variants/craask/overridetree.cb +++ b/src/mainboard/google/brya/variants/craask/overridetree.cb @@ -31,6 +31,10 @@ fw_config option CODEC_ALC5682I_VS 0 option CODEC_NAU8825 1 end + field TS_SOURCE 38 41 + option TS_UNPROVISIONED 0 + option TS_GTCH7503 1 + end end chip soc/intel/alderlake @@ -322,7 +326,25 @@ chip soc/intel/alderlake register "generic.enable_delay_ms" = "12" register "generic.has_power_resource" = "1" register "hid_desc_reg_offset" = "0x01" - device i2c 0x40 on end + device i2c 0x40 on + probe TS_SOURCE TS_UNPROVISIONED + end + end + chip drivers/i2c/hid + register "generic.hid" = ""GTCH7503"" + register "generic.desc" = ""G2 Touchscreen"" + register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)" + register "generic.probed" = "1" + register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C1)" + register "generic.reset_delay_ms" = "120" + register "generic.reset_off_delay_ms" = "3" + register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)" + register "generic.enable_delay_ms" = "12" + register "generic.has_power_resource" = "1" + register "hid_desc_reg_offset" = "0x01" + device i2c 0x40 on + probe TS_SOURCE TS_GTCH7503 + end end chip drivers/generic/gpio_keys register "name" = ""PENH"" @@ -353,7 +375,9 @@ chip soc/intel/alderlake register "generic.enable_delay_ms" = "1" register "generic.has_power_resource" = "1" register "hid_desc_reg_offset" = "0x01" - device i2c 10 on end + device i2c 10 on + probe TS_SOURCE TS_UNPROVISIONED + end end end device ref i2c2 on -- cgit v1.2.3