From 66c1d0dd3252b39220a4c50b7a4571cac82d6209 Mon Sep 17 00:00:00 2001 From: Morris Hsu Date: Tue, 7 Mar 2023 15:45:26 +0800 Subject: mb/google/brask/var/constitution: update gpio settings Remove GPP_D11,GPP_D12 in ramstage, follow baseboard brask setting. TEST=emerge-brask coreboot make sure HDMIA can display Change-Id: I953170f006699e3dc9d6111ded8234f66b9162c7 Signed-off-by: Morris Hsu Reviewed-on: https://review.coreboot.org/c/coreboot/+/73508 Tested-by: build bot (Jenkins) Reviewed-by: David Wu Reviewed-by: Eric Lai Reviewed-by: Ivy Jian --- src/mainboard/google/brya/variants/constitution/gpio.c | 4 ---- 1 file changed, 4 deletions(-) (limited to 'src/mainboard/google/brya/variants/constitution') diff --git a/src/mainboard/google/brya/variants/constitution/gpio.c b/src/mainboard/google/brya/variants/constitution/gpio.c index 90b363b3cc..6ad88ff541 100644 --- a/src/mainboard/google/brya/variants/constitution/gpio.c +++ b/src/mainboard/google/brya/variants/constitution/gpio.c @@ -29,10 +29,6 @@ static const struct pad_config override_gpio_table[] = { PAD_NC_LOCK(GPP_D9, NONE, LOCK_CONFIG), /* D10 : ISH_SPI_CS# ==> NC */ PAD_NC_LOCK(GPP_D10, NONE, LOCK_CONFIG), - /* D11 : ISH_SPI_MISO ==> NC */ - PAD_NC_LOCK(GPP_D11, NONE, LOCK_CONFIG), - /* D12 : ISH_SPI_MOSI ==> NC */ - PAD_NC_LOCK(GPP_D12, NONE, LOCK_CONFIG), /* D13 : ISH_UART0_RXD ==> PCH_I2C_U3A0_SDA */ PAD_CFG_NF_LOCK(GPP_D13, NONE, NF3, LOCK_CONFIG), /* D14 : ISH_UART0_TXD ==> PCH_I2C_U3A0_SCL */ -- cgit v1.2.3