From 582829d9acaa899d8381f2b44a82f54da42b87a1 Mon Sep 17 00:00:00 2001 From: Sumeet Pawnikar Date: Fri, 23 Jul 2021 15:50:17 +0530 Subject: mb/google/brya: create dynamic power limits mechanism for thermal Add dynamic power limits selection mechanism for brya board based on CPU SKUs which is detectable at runtime. BUG=b:194745919 BRANCH=None TEST=Build FW and test on brya with below messages, On brya (282): Overriding DPTF power limits PL1 (3000, 15000) PL2 (39000, 39000) On brya (482): Overriding DPTF power limits PL1 (4000, 28000) PL2 (43000, 43000) Change-Id: I86619516adeec13642f02ba7faf9fc4945ad774e Signed-off-by: Sumeet Pawnikar Reviewed-on: https://review.coreboot.org/c/coreboot/+/56515 Tested-by: build bot (Jenkins) Reviewed-by: Tim Wawrzynczak --- .../brya/variants/baseboard/include/baseboard/variants.h | 15 +++++++++++++++ 1 file changed, 15 insertions(+) (limited to 'src/mainboard/google/brya/variants/baseboard/include') diff --git a/src/mainboard/google/brya/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/brya/variants/baseboard/include/baseboard/variants.h index c938de820d..b992129a55 100644 --- a/src/mainboard/google/brya/variants/baseboard/include/baseboard/variants.h +++ b/src/mainboard/google/brya/variants/baseboard/include/baseboard/variants.h @@ -22,4 +22,19 @@ int variant_memory_sku(void); bool variant_is_half_populated(void); void variant_update_soc_chip_config(struct soc_intel_alderlake_config *config); +/* Modify devictree settings during ramstage */ +void variant_devtree_update(void); + +struct cpu_power_limits { + uint16_t mchid; + unsigned int pl1_min_power; + unsigned int pl1_max_power; + unsigned int pl2_min_power; + unsigned int pl2_max_power; +}; + +/* Modify Power Limit devictree settings during ramstage */ +void variant_update_power_limits(const struct cpu_power_limits *limits, + size_t num_entries); + #endif /*__BASEBOARD_VARIANTS_H__ */ -- cgit v1.2.3