From 72f95ad0522b1a51773551c46988495dba6a1128 Mon Sep 17 00:00:00 2001 From: Shelley Chen Date: Tue, 9 Jan 2024 22:10:17 -0800 Subject: mb/google/brox: Enable WLAN on root port 5 BUG=b:311450057,b:300690448,b:319188820 BRANCH=None TEST=test on device with lspci & make sure can see the Intel Network controller Change-Id: I361bef13ebd073b6fccb729a1960d3832cf2681a Signed-off-by: Shelley Chen Reviewed-on: https://review.coreboot.org/c/coreboot/+/79888 Tested-by: build bot (Jenkins) Reviewed-by: Nick Vaccaro --- src/mainboard/google/brox/variants/brox/overridetree.cb | 14 ++++++++++++++ 1 file changed, 14 insertions(+) (limited to 'src/mainboard/google/brox/variants') diff --git a/src/mainboard/google/brox/variants/brox/overridetree.cb b/src/mainboard/google/brox/variants/brox/overridetree.cb index 1962279c8c..dc1866323f 100644 --- a/src/mainboard/google/brox/variants/brox/overridetree.cb +++ b/src/mainboard/google/brox/variants/brox/overridetree.cb @@ -181,6 +181,20 @@ chip soc/intel/alderlake }" probe STORAGE STORAGE_NVME end + device ref pcie_rp5 on + register "pch_pcie_rp[PCH_RP(5)]" = "{ + .clk_src = 1, + .clk_req = 1, + .flags = PCIE_RP_LTR | PCIE_RP_AER, + }" + chip soc/intel/common/block/pcie/rtd3 + # enable_gpio is controlled by the EC with EC_EN_PP3300_WLAN + register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_H2)" + register "srcclk_pin" = "1" + device generic 0 on end + end + probe WIFI WIFI_PCIE + end device ref ish on chip drivers/intel/ish register "add_acpi_dma_property" = "true" -- cgit v1.2.3