From 8084b3856852f3fb3905e0fe4957b08518095d38 Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Fri, 30 Oct 2020 10:56:31 +0100 Subject: sb/intel/lynxpoint/sata: Always use AHCI mode MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The other two modes are not used by any mainboard, and the code seems to be copied from older southbridges. As the code looks incorrect, drop it. Change-Id: I374546279a85cead1aea13e0952bbfd6f643a75b Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/47022 Tested-by: build bot (Jenkins) Reviewed-by: Michael Niewöhner --- src/mainboard/google/beltino/devicetree.cb | 2 -- 1 file changed, 2 deletions(-) (limited to 'src/mainboard/google/beltino') diff --git a/src/mainboard/google/beltino/devicetree.cb b/src/mainboard/google/beltino/devicetree.cb index 8fdfbd79a0..176fced5ed 100644 --- a/src/mainboard/google/beltino/devicetree.cb +++ b/src/mainboard/google/beltino/devicetree.cb @@ -45,8 +45,6 @@ chip northbridge/intel/haswell register "gpe0_en_3" = "0x00000000" register "gpe0_en_4" = "0x00000000" - register "ide_legacy_combined" = "0x0" - register "sata_ahci" = "0x1" register "sata_port_map" = "0x1" register "sata_devslp_disable" = "0x1" -- cgit v1.2.3