From ba5761a947cc7bd2f13454570e62cde57f4fbd08 Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Wed, 28 Oct 2020 18:50:26 +0100 Subject: cpu/intel/haswell: Factor out ACPI C-state values There's no need to have them in the devicetree. ACPI generation can now be simplified even further, and is done in subsequent commits. Change-Id: I3a788423aee9be279797a1f7c60ab892a0af37e7 Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/46908 Reviewed-by: Arthur Heymans Tested-by: build bot (Jenkins) --- src/mainboard/google/beltino/devicetree.cb | 8 -------- 1 file changed, 8 deletions(-) (limited to 'src/mainboard/google/beltino/devicetree.cb') diff --git a/src/mainboard/google/beltino/devicetree.cb b/src/mainboard/google/beltino/devicetree.cb index 176fced5ed..8c54f6a6d0 100644 --- a/src/mainboard/google/beltino/devicetree.cb +++ b/src/mainboard/google/beltino/devicetree.cb @@ -18,14 +18,6 @@ chip northbridge/intel/haswell device lapic 0 on end # Magic APIC ID to locate this chip device lapic 0xACAC off end - - register "c1_battery" = "2" # ACPI(C1) = MWAIT(C1E) - register "c2_battery" = "3" # ACPI(C2) = MWAIT(C3) - register "c3_battery" = "9" # ACPI(C3) = MWAIT(C7S) - - register "c1_acpower" = "2" # ACPI(C1) = MWAIT(C1E) - register "c2_acpower" = "3" # ACPI(C2) = MWAIT(C3) - register "c3_acpower" = "9" # ACPI(C3) = MWAIT(C7S) end end -- cgit v1.2.3