From 97e21d3e956ea2657a63fb98c22548f9fd52afef Mon Sep 17 00:00:00 2001 From: Michael Niewöhner Date: Mon, 28 Dec 2020 00:49:33 +0100 Subject: nb/intel/hsw,soc/intel/{bdw,skl,apl},mb/*: unify dt panel settings MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit There are multiple different devicetree setting formats for graphics panel settings present in coreboot. Replace the ones for the platforms that already have (mostly) unified gma/graphics setup code by a unified struct in the gma driver. Hook it up in HSW, BDW, SKL, and APL and adapt the devicetrees accordingly. Always ensure that values don't overflow by applying appropriate masks. The remaining platforms implementing panel settings (GM45, i945, ILK and SNB) can be migrated later after unifying their gma/graphics setup code. Signed-off-by: Michael Niewöhner Change-Id: I445defe01d5fbf9a69cf05cf1b5bd6c7c2c1725e Reviewed-on: https://review.coreboot.org/c/coreboot/+/48885 Tested-by: build bot (Jenkins) Reviewed-by: Angel Pons Reviewed-by: Nico Huber --- src/mainboard/google/auron/devicetree.cb | 3 --- .../google/auron/variants/auron_paine/overridetree.cb | 14 ++++++++------ .../google/auron/variants/auron_yuna/overridetree.cb | 14 ++++++++------ src/mainboard/google/auron/variants/buddy/overridetree.cb | 14 ++++++++------ src/mainboard/google/auron/variants/gandof/overridetree.cb | 14 ++++++++------ src/mainboard/google/auron/variants/lulu/overridetree.cb | 14 ++++++++------ src/mainboard/google/auron/variants/samus/overridetree.cb | 14 ++++++++------ 7 files changed, 48 insertions(+), 39 deletions(-) (limited to 'src/mainboard/google/auron') diff --git a/src/mainboard/google/auron/devicetree.cb b/src/mainboard/google/auron/devicetree.cb index 26a53366b4..8bf2c129a4 100644 --- a/src/mainboard/google/auron/devicetree.cb +++ b/src/mainboard/google/auron/devicetree.cb @@ -12,9 +12,6 @@ chip soc/intel/broadwell # Enable HDMI Hotplug with 6ms pulse register "gpu_dp_b_hotplug" = "0x06" - # Set backlight PWM value for eDP - register "gpu_pch_backlight_pwm_hz" = "200" - register "s0ix_enable" = "1" device cpu_cluster 0 on diff --git a/src/mainboard/google/auron/variants/auron_paine/overridetree.cb b/src/mainboard/google/auron/variants/auron_paine/overridetree.cb index cb7fb62b34..62e42b1718 100644 --- a/src/mainboard/google/auron/variants/auron_paine/overridetree.cb +++ b/src/mainboard/google/auron/variants/auron_paine/overridetree.cb @@ -1,11 +1,13 @@ chip soc/intel/broadwell - # Set panel power delays - register "gpu_panel_power_cycle_delay_ms" = "400" - register "gpu_panel_power_up_delay_ms" = "40" - register "gpu_panel_power_down_delay_ms" = "15" - register "gpu_panel_power_backlight_on_delay_ms" = "7" - register "gpu_panel_power_backlight_off_delay_ms" = "210" + register "panel_cfg" = "{ + .up_delay_ms = 40, + .down_delay_ms = 15, + .cycle_delay_ms = 400, + .backlight_on_delay_ms = 7, + .backlight_off_delay_ms = 210, + .backlight_pwm_hz = 200, + }" device domain 0 on chip soc/intel/broadwell/pch diff --git a/src/mainboard/google/auron/variants/auron_yuna/overridetree.cb b/src/mainboard/google/auron/variants/auron_yuna/overridetree.cb index 746ec9a58f..174463d0b7 100644 --- a/src/mainboard/google/auron/variants/auron_yuna/overridetree.cb +++ b/src/mainboard/google/auron/variants/auron_yuna/overridetree.cb @@ -1,11 +1,13 @@ chip soc/intel/broadwell - # Set panel power delays - register "gpu_panel_power_cycle_delay_ms" = "400" - register "gpu_panel_power_up_delay_ms" = "40" - register "gpu_panel_power_down_delay_ms" = "15" - register "gpu_panel_power_backlight_on_delay_ms" = "210" - register "gpu_panel_power_backlight_off_delay_ms" = "210" + register "panel_cfg" = "{ + .up_delay_ms = 40, + .down_delay_ms = 15, + .cycle_delay_ms = 400, + .backlight_on_delay_ms = 210, + .backlight_off_delay_ms = 210, + .backlight_pwm_hz = 200, + }" device domain 0 on chip soc/intel/broadwell/pch diff --git a/src/mainboard/google/auron/variants/buddy/overridetree.cb b/src/mainboard/google/auron/variants/buddy/overridetree.cb index 5423043cd8..6762eb42c4 100644 --- a/src/mainboard/google/auron/variants/buddy/overridetree.cb +++ b/src/mainboard/google/auron/variants/buddy/overridetree.cb @@ -1,11 +1,13 @@ chip soc/intel/broadwell - # Set panel power delays - register "gpu_panel_power_cycle_delay_ms" = "400" - register "gpu_panel_power_up_delay_ms" = "40" - register "gpu_panel_power_down_delay_ms" = "15" - register "gpu_panel_power_backlight_on_delay_ms" = "7" - register "gpu_panel_power_backlight_off_delay_ms" = "210" + register "panel_cfg" = "{ + .up_delay_ms = 40, + .down_delay_ms = 15, + .cycle_delay_ms = 400, + .backlight_on_delay_ms = 7, + .backlight_off_delay_ms = 210, + .backlight_pwm_hz = 200, + }" register "s0ix_enable" = "0" diff --git a/src/mainboard/google/auron/variants/gandof/overridetree.cb b/src/mainboard/google/auron/variants/gandof/overridetree.cb index 19c0ca0003..ca5d616659 100644 --- a/src/mainboard/google/auron/variants/gandof/overridetree.cb +++ b/src/mainboard/google/auron/variants/gandof/overridetree.cb @@ -1,11 +1,13 @@ chip soc/intel/broadwell - # Set panel power delays - register "gpu_panel_power_cycle_delay_ms" = "400" - register "gpu_panel_power_up_delay_ms" = "40" - register "gpu_panel_power_down_delay_ms" = "15" - register "gpu_panel_power_backlight_on_delay_ms" = "50" - register "gpu_panel_power_backlight_off_delay_ms" = "210" + register "panel_cfg" = "{ + .up_delay_ms = 40, + .down_delay_ms = 15, + .cycle_delay_ms = 400, + .backlight_on_delay_ms = 50, + .backlight_off_delay_ms = 210, + .backlight_pwm_hz = 200, + }" device domain 0 on chip soc/intel/broadwell/pch diff --git a/src/mainboard/google/auron/variants/lulu/overridetree.cb b/src/mainboard/google/auron/variants/lulu/overridetree.cb index cb7fb62b34..62e42b1718 100644 --- a/src/mainboard/google/auron/variants/lulu/overridetree.cb +++ b/src/mainboard/google/auron/variants/lulu/overridetree.cb @@ -1,11 +1,13 @@ chip soc/intel/broadwell - # Set panel power delays - register "gpu_panel_power_cycle_delay_ms" = "400" - register "gpu_panel_power_up_delay_ms" = "40" - register "gpu_panel_power_down_delay_ms" = "15" - register "gpu_panel_power_backlight_on_delay_ms" = "7" - register "gpu_panel_power_backlight_off_delay_ms" = "210" + register "panel_cfg" = "{ + .up_delay_ms = 40, + .down_delay_ms = 15, + .cycle_delay_ms = 400, + .backlight_on_delay_ms = 7, + .backlight_off_delay_ms = 210, + .backlight_pwm_hz = 200, + }" device domain 0 on chip soc/intel/broadwell/pch diff --git a/src/mainboard/google/auron/variants/samus/overridetree.cb b/src/mainboard/google/auron/variants/samus/overridetree.cb index 989b887628..34a785b711 100644 --- a/src/mainboard/google/auron/variants/samus/overridetree.cb +++ b/src/mainboard/google/auron/variants/samus/overridetree.cb @@ -3,12 +3,14 @@ chip soc/intel/broadwell # Enable DDI2 Hotplug with 6ms pulse register "gpu_dp_c_hotplug" = "0x06" - # Set panel power delays - register "gpu_panel_power_cycle_delay_ms" = "500" - register "gpu_panel_power_up_delay_ms" = "200" - register "gpu_panel_power_down_delay_ms" = "50" - register "gpu_panel_power_backlight_on_delay_ms" = "200" - register "gpu_panel_power_backlight_off_delay_ms" = "200" + register "panel_cfg" = "{ + .up_delay_ms = 200, + .down_delay_ms = 50, + .cycle_delay_ms = 500, + .backlight_on_delay_ms = 200, + .backlight_off_delay_ms = 200, + .backlight_pwm_hz = 200, + }" register "vr_slow_ramp_rate_set" = "3" register "vr_slow_ramp_rate_enable" = "1" -- cgit v1.2.3